Semiconductor circuits for driving current-driven display and display

ABSTRACT

In a semiconductor circuit of a current output type, when display is performed by plural semiconductor circuit in one display panel, luminance unevenness for each block with a different semiconductor circuit occurs due to fluctuation in the semiconductor circuits. In current output stages, current mirror circuits are constituted at both ends of a chip, and a reference current to be a reference of gradation display is supplied from both the ends. Moreover, by increasing a resistance value of a gate line of the current mirror circuit of distributing a current to each output, deviation of a transistor threshold value in the chip was compensated for, and output currents at left and right ends were matched. Moreover, reference currents were made the same by connecting resistors for reference current generation to each other at least between semiconductor circuits connected side by side, and fluctuation of current values across all semiconductor circuits decreased to 1% or less, whereby unevenness which occurred in boundaries of chips could be eliminated.

TECHNICAL FIELD

The present invention relates to a driving semiconductor circuit groupor the like for a current drive type display device of performingcurrent output which is used for a display device of performinggradation display according to an amount of current such as an organicfield luminous element.

BACKGROUND ART

An organic luminous element is hopeful for a display device of the nextgeneration, because the organic luminous element is a self-luminouselement, and therefore, for example, the device does not require a backlight required in a liquid crystal display device, and has a wideviewing angle.

A sectional view of an element structure of a general organic luminouselement is shown in FIG. 2. The organic luminous element has a structurein which an organic layer 22 is sandwiched by a cathode 21 and an anode23. When a DC power supply 24 is connected to this organic luminouselement, holes and electrons are injected into the organic layer 22 fromthe anode 23 and the cathode 21, respectively. The injected holes andelectrons move to the counter electrodes in the organic layer 22 due toan electric field formed by the power supply 24. The electrons and theholes are combined again within the organic layer 22 in the course ofthe movement to generate excitons. Luminescence is observed in a processin which energy of the excitons is deactivated. Luminescent colors aredifferent depending upon energy inherent in the excitons, and lighthaving a wavelength of energy substantially corresponding to a value ofan energy band gap inherent in the organic layer 22 is generated.

In order to take out the light generated in the organic layer to theoutside, a material, which is transparent in a visible light region, isused for at least one of the electrodes. A material, which has a lowwork function, is used for the cathode in order to facilitate injectionof electrons into the organic layer. For example, a material such asaluminum, magnesium, or calcium is used. A material such as an alloy ofthese metals or aluminum-lithium alloy may be used for durability and alower work function.

On the other hand, a material having a large ionization potential isused for the anode owing to its easiness to inject holes. In addition,since the cathode does not have transparency, a transparent material isoften used for this electrode. Therefore, in general, an ITO (Indium TinOxide), gold, indium zinc oxide (IZO), or the like is used.

In recent years, in an organic luminous element using a low molecularmaterial, in order to increase luminous efficiency, as shown in FIG. 3(a), the organic layer 22 may be constituted by plural layers (in thiscase, four layers). An electron injection layer 31 is provided in orderto make it easy to inject electrons into the organic layer from thecathode 21. Similarly, a hole injection layer 34 is used for improvingeasiness to inject holes from the anode 23. These injection layers areoften formed at thickness of about 5% to 20% with respect to thicknessof the organic layer 22. This makes it possible to increase the numberof carriers for both electrons and holes to be injected into the organiclayer. As materials used for these layers, a material having a value ofelectron affinity close to the work function of the cathode 21 is usedin the case of the electron injection layer 31, and a material having avalue of ionization potential close to the value of the anode 23 is usedin the case of the hole injection layer 34.

On the other hand, materials used for an electron transport layer 32 anda hole transport layer 33 are materials having high mobility of carriersto be transported. In addition, a material having high fluorescence isused for one of the layers, and the layer contributes to luminescence.In other words, one of the layers also functions as a luminous layer. Atpresent, since there are many luminous materials having an electrontransport property, in general, the electron transport layer 32 alsofunctions as the luminous layer. In this layer, the carriers for bothelectrons and holes, which have been injected and moved, are combinedagain, and light is emitted to the outside. Thus, a material of emittinglight having a desired wavelength is used for the electron transportlayer 32. As representative materials, there are an aluminum-quinolinecomplex for green, a europium complex for red, and the like. Note that,in the case in which the electron transport layer 32 and the holetransport layer 33 are used as the luminous layer, one of the layers isnot always constituted by one material but may be constituted by amaterial obtained by scattering a fluorescent pigment (guest material)in a certain material (host material).

Luminance of the organic luminous element formed in this way isproportional to a current as shown in FIG. 4( a) and is in a nonlinearrelation with respect to a voltage as shown in FIG. 4( b). Therefore, inorder to perform gradation control, it is better to control the organicluminous element according to a value of current.

An example in the case in which organic luminous elements areincorporated in a passive matrix type display device is shown in FIG. 5.Organic luminous elements 55 are arranged in points of intersection ofsegment signal lines 56 and common signal lines 57 such that a currentfrom the segment signal lines 56 is flown to any one of the organicluminous elements on the identical segment signal lines 56 according toan operation of a common driver 52. Gradation display is performed bythe current flowing to the segment signal lines 56.

Therefore, a segment driver 51 is required to be a driver of a currentoutput type.

On the other hand, in the case of an active matrix type, display devicesare roughly divided into those of two systems, namely, a voltage drivesystem and a current drive system.

The voltage drive system is a method of using a source driver of avoltage output type, converting a voltage into a current inside a pixel,and supplying the converted current to organic luminous elements.

The current drive system is a method of using a source driver of acurrent output type, giving only a function of retaining a value ofcurrent, which is outputted for one horizontal scanning period, inside apixel, and supplying the same value of current as the source driver toorganic luminous elements.

An example of a circuit structure inside a pixel of the voltage drivesystem is shown in FIG. 6. A voltage supplied from a source signal line60 is applied to a driving transistor 62 through a transistor 66 withina period of selecting the pixel. Note that a capacitor 65 is used forretaining information during one frame even after the period ofselecting the pixel has ended.

A current flows from an EL power supply line 64 to an organic luminouselement 63 according to a gate voltage of the driving transistor62—drain current characteristic. It is possible to change an amount ofcurrent flowing to the organic luminous element 63 by changing a valueof voltage to be applied to the source signal line 60.

However, in this system, there is a problem in that, if there isfluctuation in a voltage/current characteristic of the drivingtransistor 62, according to the fluctuation, fluctuation is caused inthe current flowing to the organic luminous element.

This pixel circuit is often formed of a low-temperature polysiliconprocess. In the low-temperature polysilicon process, unevenness iseasily caused in an amount of laser irradiation used at the time ofpolycrystallization, and fluctuation is also caused in characteristicsof a transistor according to this unevenness of irradiation. In such avoltage drive system, there is a problem in that, since it is difficultto eliminate this unevenness of irradiation in a process, streakscorresponding to a direction of laser irradiation are caused, andunevenness of display is caused.

On the other hand, examples of the current drive system are shown inFIGS. 7 and 8. The system of FIG. 7 uses a current copier system in apixel circuit. The system of FIG. 8 uses a current mirror system.

A circuit at the time of operation of a pixel 74 in FIG. 7 is shown inFIGS. 9( a) and (b).

When a pixel is selected, as shown in FIG. 9( a), a signal is outputtedfrom a gate driver 71 such that a gate signal line 61 a of a row of thepixel brings a switch into a conduction state and a gate signal line 61b of the line brings a switch into a non-conduction state. A state ofthe pixel circuit at this point is shown in FIG. 9( a). At this point, acurrent flowing to the source signal line 60, which is a currentattracted into a source driver 17, flows through a path indicated bydotted line 101. Thus, a current identical with the current flowing tothe source signal line 60 flows to a transistor 72. Then, a potential ofa node 102 changes to a potential corresponding to a current/voltagecharacteristic of the transistor 72.

Next, when the pixel changes to an unselected state, the circuit ischanged to a circuit as shown in FIG. 9( b) by the gate signal lines 61.A current flows from the EL power supply line 64 to the organic luminouselement 63 through a path of dotted line indicated by 103. This currentdepends upon the potential of the node 102 and the current/voltagecharacteristic of the transistor 72.

In FIGS. 9( a) and (b), the potential of the node 102 does not change.Therefore, a drain current flowing to the identical transistor 72 isidentical in FIGS. 9( a) and (b) Consequently, a current of the samevalue as the value of current flowing to the source signal line 60 flowsto the organic luminous element 63. Even if there is fluctuation in thecurrent/voltage characteristic of the transistor 72, values of currents101 and 103 are not affected in principle, and uniform display withoutinfluence of fluctuation in characteristics of a transistor can berealized.

Similarly, in the case of the current mirror system of FIG. 8, a currentflowing to the source signal line 60 through a path indicated by Iw inFIG. 10( a) flows in the pixel at the time when a row is selected. Avoltage corresponding to a gate potential at the time when the currentIw flows to a transistor 82 b is applied to a node 105.

A current through a path indicated by Ie of FIG. 10( b) flows in thepixel at the time when a row is not selected. A potential of the node105 is retained between period of (a) and (b) by a capacitor 65.Therefore, if characteristics of transistors 82 a and 82 b are equal,Iw=Ie.

It is likely that a current flowing to an organic luminous elementchanges with respect to fluctuation in transistor characteristics.However, since the transistors 82 a and 82 b are located in theidentical pixel circuit and arranged close to each other compared withthe case of the voltage drive, it is possible to reduce fluctuation in acurrent. Unevenness of display is small compared with the voltage drive.

Therefore, it is necessary to use the current drive system in order toobtain uniform display. For that purpose, the source driver 17 must be adriver IC of a current output type.

An example of an output stage of a current driver IC, which outputs avalue of current according to a gradation, is shown in FIG. 11. Ananalog current is outputted to display gradation data 115 from 114 by adigital/analog conversion unit 116. The analog/digital conversion unitis constituted by plural (at least the number of bits of the gradationdata 115) current sources for gradation display 113 and switches 118,and a common gate line 117 which regulates a value of current flown byone current source for gradation display 113.

In FIG. 11, an analog current is outputted in response to the input 115of three bits. It is selected by the switches 118 whether the currentsources 113 of the number corresponding to a weight of bits areconnected to the current output 114, whereby a current corresponding toa gradation can be outputted in such a manner that a current equivalentto one current source 113 is outputted in the case of data 1 and acurrent equivalent to seven current sources 113 is outputted in the caseof data 7. A current output type driver can be realized by arranging 116of this structure by the number corresponding to the number of outputsof the driver. In order to compensate for a temperature characteristicof the transistors 113, a voltage of the common gate line 117 isdetermined by a distributing mirror transistor 112. The transistor 112and the current source group 113 are formed in a current mirrorstructure, and a current per one gradation is determined according to avalue of a reference current 19. With this structure, an output currentchanges according to a gradation, and a current per one gradation isdetermined according to a reference current.

Examples of a display device using an organic luminous element are shownin FIGS. 12 to 14. FIGS. 12( a) and (b) show a television, FIG. 13 showsa digital camera or a digital video camera, and FIG. 14 shows a personaldigital assistant. Since a response speed of the organic luminouselement is high, the organic luminance element is a display panelsuitable for these display devices which has many opportunities todisplay motion images.

When the number of source signal lines of these display devicesincreases, as shown in FIG. 15, it is required to use plural currentoutput type source driver ICs 17 with respect to one display panel 151.In this case, if output currents of the driver ICs 17 have fluctuationof 1% or more among chips, luminance is different in each display areaof 152 a and 152 c, and block unevenness is caused. Therefore, a measurefor cascade connection of the driver ICs 17 is required.

In order to reduce fluctuation of output currents among different chips,it is necessary to make a value of the reference current 19 uniform. Asa conventional technique of making a reference current uniform, thereare known systems such as shown in FIG. 16 (e.g., see Japanese PatentApplication Laid-Open No. 2000-293245) and FIG. 19. Note that, sincethere is no detailed description about an output stage 164, the outputstage shown in FIG. 3 is applied.

In the method of FIG. 16, one original current 161 is inputted toreference current distribution units 162 in the driver ICs 17 togenerate plural reference currents. A circuit structure example of areference current distribution unit is shown in FIG. 17. Pluralreference currents 163 a to 163 c are outputted to the original current161 by a current mirror circuit. These reference currents 163 aresupplied to the driver ICs 17, respectively, to make reference currentsof all the driver ICs 17, which are connected in cascade, equal, wherebythe block unevenness is eliminated. Note that there is also a method inwhich 161 is voltage input rather than a current, and the voltage inputis connected to a connection line 185 to an operational amplifier 183shown in FIG. 18. The voltage is changed to a current by acurrent/voltage conversion unit 184, and a current flowing to a resistor182 becomes an original current. There is also a method in which thiscurrent is distributed by a current mirror to output the referencecurrent 163. The resistor 182 may be incorporated in the driver ICs 17or may be provided externally.

In a second method of supplying an identical reference current to theplural driver ICs 17 shown in FIG. 19, the reference current 161 isdirectly inputted to an output stage 164 in a first driver 17 a. In acurrent delivery unit 191, a transistor 201 is connected to a commondata line 117 to take a current mirror structure with respect to areference current. If the reference current is outputted directly, adirection of the current is reversed. Thus, the current direction isfurther changed by a current mirror structure consisting of transistors202 and 203, whereby the reference current is supplied to another driverIC 17 by 192. Consequently, the identical reference current flows to therespective driver ICs. Note that the entire disclosure of JapanesePatent Application Laid-Open No. 2000-293245 described above isincorporated herein by reference in its entirety.

In the structure of FIG. 16, in the case in which a display device usingplural driver ICs is manufactured, the number of driver ICs, which canbe arranged in plural form, is limited by the number of current outputsof the reference current distribution unit 162. For example, in thestructure of FIG. 17, only three driver ICs can be arranged at themaximum. In addition, if 162 is arranged in the outside, since anothersemiconductor circuit is required, there is a problem in that packagingcost and a module structure are complicated.

In addition, in a structure shown in FIG. 20, it is necessary to pass acurrent through a current mirror circuit twice in order to generate areference current, and fluctuation tends to increase. Since it isnecessary to increase a transistor size in order to control thefluctuation, it is required to increase a chip size. In addition, acurrent passes through a current mirror of two stages for one chip, inthe case of N (N: natural number) chip connection, since the currentmirror is repeated 2N times, the original current 161 and an Nthreference current tend to deviate from each other.

In addition, in a method of regulating a current per one gradation ofeach output with a current mirror using the structure of FIG. 11 in astructure of an output stage as well, as a transistor of a mirror sourceand a transistor for output are further apart from each other, thecurrent is affected by fluctuation of characteristics of the transistorsmore easily due to characteristics of the current mirror.

For example, the distributing mirror transistor 112 is arranged at aleft end, and the digital analog conversion unit 116 is arranged in thevicinity of an output pad. In that case, if there is shift of athreshold voltage as shown in FIG. 21( a) in a silicon wafer, outputcurrents are different at left and right ends of the driver IC as shownin FIG. 21( b). For example, when the threshold voltage fluctuates asindicated by 211 a, since a voltage of the common gate line 117 formingthe current mirror is uniform, the current output at the right enddecreases compared with the mirror source at the left end. Similarly,relations as indicated by 212 ab and 213 ab are obtained.

Therefore, even if a reference current value is uniform in all thedrivers IC 17, in the case in which plural driver ICs having such anoutput characteristic are arranged, a difference is caused in currentvalues at boundaries of the driver ICs as shown in FIG. 22.Consequently, block unevenness is caused.

In order to eliminate unevenness for each IC in current driver ICs,there are objects of making it possible to input a reference currentuniformly and making current values at left and right ends of anidentical chip the same.

DISCLOSURE OF THE INVENTION

A first present invention is a driving semiconductor circuit group for acurrent drive type display device constituted by arranging pluraldriving semiconductor circuits wherein,

said driving semiconductor circuits comprises: a drive current outputmechanism having a common gate line, first and second currentdistributing means which are provided at both ends of said common gateline and receive input of a reference current, and plural drive currentgenerating means which are provided along said common gate line andgenerate drive currents on the basis of the reference current to bedistributed from said current distributing means in a current mirrorsystem; and reference current generating means which are provided in thevicinity of said current distributing means and generate the referencecurrent from a reference voltage signal having a reference voltage andpredetermined power supplies having a voltage higher than the referencevoltage, wherein

said plural driving semiconductor circuits are arranged, such that theends of said common gate line of the respective driving semiconductorcircuits are adjacent to each other,

and wherein a pair of the reference current generating means adjacent toeach other in a pair of said driving semiconductor circuits adjacent toeach other acquire the predetermined power supplies from the opposeddriving semiconductor circuits each other and generate the referencecurrent from the predetermined power supplies and the reference voltagesignal to be supplied to said driving semiconductor circuits,

said driving semiconductor circuit at least includes plural resistanceelements connected in series which are provided between saidpredetermined power supplies of each of said pair of reference currentgenerating means adjacent to each other and said pair of referencecurrent generating means corresponding to the power supplies,respectively, and

a part of said plural resistance elements connected in series are formedon a chip of one of said pair of driving semiconductor circuit adjacentto each other, and the remainder of said plural resistance elements areformed on a chip of the other of said pair of driving semiconductorcircuits adjacent to each other.

In addition, a second present invention is a driving semiconductorcircuit group for a current drive type display device constituted byarranging plural driving semiconductor circuits, which includes: a drivecurrent output mechanism having a common gate line, first and secondcurrent distributing means which are provided at both ends of the commongate line and receive input of a reference current, and plural drivecurrent generating means which are provided along the common gate lineand generate drive currents on the basis of the reference current to bedistributed from the current distributing means in a current mirrorsystem; and reference current generating means which are provided in thevicinity of the current distributing means and generate the referencecurrent from a reference voltage signal having a reference voltage andpredetermined power supplies having a voltage higher than the referencevoltage, such that the ends of the common gate line of the respectivedriving semiconductor circuits are adjacent to each other, in which

a pair of the reference current generating means adjacent to each otherin a pair of the driving semiconductor circuits adjacent to each otheracquire the predetermined power supplies from the opposed drivingsemiconductor circuits each other and generate the reference currentfrom the predetermined power supplies and the reference voltage signalto be supplied to the driving semiconductor circuits, and

resistance elements are provided between the predetermined powersupplies of the respective pair of reference current generating meansadjacent to each other and the pair of reference current generatingmeans corresponding to the power supplies, respectively.

In addition, a third present invention is the driving semiconductorcircuit group for a current drive type display device of the first orthe second present invention,

wherein a ratio of a sum of channel areas of a semiconductor elementgroup used for said first and second current distributing means withrespect to a sum of channel areas of a semiconductor element group usedfor said drive current generating means is substantially 0.01 or moreand 0.5 or less.

In addition, a fourth present invention is the driving semiconductorcircuit group for a current drive type display device of the first orthe second present invention,

wherein a value of (channel width)/(channel length) of a semiconductorelement of a semiconductor element group used for said drive currentgenerating means is substantially 0.01 or more and 0.6 or less.

In addition, a fifth present invention is the driving semiconductorcircuit group for a current drive type display device of the first orthe second present invention,

wherein a total resistance value of said common gate line issubstantially set to a value equal to or larger than a larger one of avalue, which is found by dividing a voltage of a difference between amaximum value and a minimum value of a gate voltage with respect to areference current value in a use process by a value of substantially0.5% of the reference current (Is×0.005)(Vgb−Vgw)/(Is×0.005), and 1 KΩ,and equal to or smaller than 5 MΩ.

In addition, a sixth present invention is the driving semiconductorcircuit group for a current drive type display device of the first orthe second present invention, the driving semiconductor circuit groupdetermining, with first switching means group, whether or not said drivecurrent generating means is connected to an output stage according tothe input signal, comprising a current path forming unit which allows apredetermined current value to flow to said drive current generatingmeans via second switching means group for determining a state oppositeto a state determined by said first switching means group.

In addition, a seventh present invention is a driving semiconductorcircuit group constituted by arranging plural driving semiconductorcircuits for a current drive type display device, which includes: adrive current output mechanism having first and second currentdistributing means which receive input of a reference current, andplural drive current generating means which generate drive currents onthe basis of the reference current to be distributed from the currentdistributing means; and reference current generating means whichgenerate the reference current from a reference voltage signal having areference voltage and predetermined power supplies having a voltagehigher than the reference voltage, such that respective outputs of thereference current are adjacent to each other, in which

in a pair of the driving semiconductor circuits adjacent to each other,the respective reference current generating means acquire thepredetermined power supplies from the opposed driving semiconductorcircuits each other and generate the reference current from thepredetermined power supplies and the reference voltage signal to besupplied to the driving semiconductor circuits,

the drive current output mechanism has a multi-stage structure,

each stage of the multi-stage structure has at least one set having acurrent source and a delivery unit which takes out plural outputs fromthe current source,

a current source of a first stage of the multi-stage structure is thereference current to be distributed from the current distributing means,

the plural outputs of the delivery unit of a last stage of themulti-stage structure are the drive currents,

the plural outputs of the delivery units of the respective stagesexcluding the last stage are given to the current source of the set of astage below the stages, respectively.

In addition, an eighth present invention is the driving semiconductorcircuit group for a current drive type display device of the seventhpresent invention, in which

the driving semiconductor circuits have at least plural resistanceelements connected in series which are provided between thepredetermined power supplies of the reference current generating meansfor the respective pair of driving semiconductor circuits adjacent toeach other and the pair of reference current generating meanscorresponding to the power supplies, respectively, and

a part of the plural resistance elements connected in series are formedon a chip of one of the pair of driving semiconductor circuits adjacentto each other, and the remainder of the resistance elements are formedon a chip of the other of the pair of driving semiconductor circuitsadjacent to each other.

Further, a ninth present invention is the driving semiconductor circuitgroup for a current drive type display device of the seventh presentinvention, in which

the driving semiconductor circuits have at least plural resistanceelements connected in parallel which are provided between thepredetermined power supplies of the reference current generating meansof the respective pair of driving semiconductor circuits adjacent toeach other and the pair of reference current generating meanscorresponding to the power supplies, respectively, and

a part of the plural resistance elements connected in parallel areformed on a chip of one of the pair of driving semiconductor circuitsadjacent to each other, and the remainder of the resistance elements areformed on a chip of the other of the pair of driving semiconductorcircuits adjacent to each other.

Moreover, a tenth present invention is the driving semiconductor circuitgroup for a current drive type display device of the seventh presentinvention, including

resistance elements which are provided between the predetermined powersupplies of the respective reference current generating means and thepair of reference current generating means corresponding to the powersupplies, respectively.

In addition, an eleventh present invention is a display devicecomprising the driving semiconductor circuit group of any one of thefirst to the tenth present inventions.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram showing an external connection wire bound at thetime when plural reference current generation units of driver ICs areused in an embodiment of the present invention;

FIG. 2 is a diagram showing a structure of an organic luminance element;

FIG. 3 is a diagram showing a structure of an organic luminance elementin which plural organic layers are present;

FIG. 4 is a diagram showing a current-voltage-luminance characteristicof an organic luminance element;

FIG. 5 is a diagram showing a passive matrix type display device usingorganic luminance elements;

FIG. 6 is a diagram showing an example of a pixel circuit for one pixelin an active matrix type display device using organic luminanceelements;

FIG. 7 is a diagram showing a circuit of an active matrix type displaydevice using a pixel circuit of a current copier structure;

FIG. 8 is a diagram showing a circuit of an active matrix type displaydevice using a pixel circuit of a current mirror structure;

FIG. 9 is a diagram showing an operation of a current copier circuit;

FIG. 10 is a diagram showing an operation of a current mirror circuit;

FIG. 11 is a diagram showing a circuit of outputting a current to eachoutput of a current output type driver;

FIG. 12 is a diagram showing a case in which a display device using theembodiment of the present invention is applied to a television;

FIG. 13 is a diagram showing a case in which the display device usingthe embodiment of the present invention is applied to a digital camera;

FIG. 14 is a diagram showing a case in which the display device usingthe embodiment of the present invention is applied to a personal digitalassistant;

FIG. 15 is a diagram showing a display panel using plural source driverICs;

FIG. 16 is a diagram showing a method of connecting plural driver ICs incascade in a conventional method;

FIG. 17 is a diagram showing an example of a circuit of a referencecurrent distribution unit in FIG. 16;

FIG. 18 is a diagram showing an example of the circuit of the referencecurrent distribution unit in FIG. 16 and a circuit of generating areference current;

FIG. 19 is a diagram showing a method of connecting plural driver ICs incascade in a conventional method;

FIG. 20 is a diagram showing an example of a circuit of a currentdelivery unit 191 in FIG. 19;

FIG. 21 is a diagram showing a distribution of a threshold voltage of atransistor in an identical IC chip and dependency on a distance from adistributing mirror transistor of an output current value following thedistribution;

FIG. 22 is a diagram showing each output current value at the time whentwo driver ICs having the output characteristic of FIG. 21( b) areconnected;

FIG. 23 is a circuit block diagram of a driver IC in the embodiment ofthe present invention;

FIG. 24 is a diagram showing an equivalent circuit at the time when asource signal line current flows to a pixel in a pixel circuit of acurrent copier structure;

FIG. 25 is a diagram showing a relation among a current output at oneoutput terminal, a pre-charge voltage application unit, and a changeoverswitch;

FIG. 26 is a diagram showing a difference of a luminance to currentcharacteristic according to a luminescent color;

FIG. 27 is a diagram showing a circuit block which can output apre-charge voltage different for each display color;

FIG. 28 is a block diagram of a driver IC at the time when it can beselected from the outside whether pre-charge is performed for each videosignal for one dot;

FIG. 29 is a diagram showing a relation between gradation data and apre-charge judgment signal;

FIG. 30 is a diagram showing a circuit of a reference current generationunit;

FIG. 31 is a diagram showing a reference current generation unit whichcan change a reference current to be generated according to controldata;

FIG. 32 is a diagram showing a circuit and an external wiring ofsupplying an identical reference current to plural driver ICs;

FIG. 33 is a circuit block diagram of changing a reference currentaccording to key input or extraneous light;

FIG. 34 is a diagram showing a current output stage where current valuesat left and right ends are equal in the embodiment of the presentinvention;

FIG. 35 is a diagram showing a digital/analog conversion unit ofoutputting a corresponding current from video signal data;

FIG. 36 is a diagram showing a change in a threshold voltage of atransistor in an IC chip and an output current characteristiccorresponding to the change in the case in which the output stage ofFIG. 34 is used;

FIG. 37 is a circuit diagram of a driver IC utilizing the circuitstructures of FIG. 31 and FIG. 34;

FIG. 38 is a diagram showing a relation between a transistor size of acurrent source for gradation display 113 of FIG. 35 and fluctuation inan output current;

FIG. 39 is a diagram showing an example of a display image forindicating a place where a luminescent line and a black line are caused;

FIG. 40 is a diagram showing source signal line voltage waveforms incolumns of 396 and 397 in the case in which image display shown in FIG.39 is performed;

FIG. 41 is a diagram showing connection between an output stage of adriver IC and a pixel circuit;

FIG. 42 is a diagram showing a voltage and a current waveform of eachpart of an output stage of a driver IC corresponding to input data;

FIG. 43 is a diagram indicating that a hazard in a part 421 of FIG. 42changes according to the number of mirror transistors;

FIG. 44 is a diagram of a case in which the number of mirror transistorsof distributing a reference current source is increased;

FIG. 45 is a diagram showing a relation between a channel total area ofa distributing mirror transistor/a channel total area of a currentsource for gradation display and a gate voltage change rate;

FIG. 46 is a diagram showing an allowable level of a hazard of 421 inFIG. 42;

FIG. 47 is a diagram showing a distributing mirror transistor group;

FIG. 48 is a schematic diagram of a layout of distributing mirrortransistors and current output stages;

FIG. 49 is a schematic diagram of a layout of distributing mirrortransistors and current output stages in a driver IC of performingmulticolor display;

FIG. 50 is a diagram showing a digital/analog conversion unit in thecase in which a transistor is added in order to control an amount ofpotential change at a node 411;

FIG. 51 is a diagram showing a relation between a switch 118 f and apotential of the node 411;

FIG. 52 is a diagram in the case in which a resistor is used instead ofthe transistor in FIG. 50;

FIG. 53 is a diagram showing a relation between a gate voltage and adrain current of a transistor 32 to which gate and drain electrodes areconnected;

FIG. 54 is a diagram showing a relation between a change rate of anoutput current and a gate signal line voltage with respect to a channelwidth/a channel length of a transistor;

FIG. 55 is a diagram showing a relation between a source to drainvoltage and a drain current of a transistor 113;

FIG. 56 is a diagram showing a relation among a reference current a gatecurrent, and a current flowing in a distributing mirror transistor in astructure of a current output stage in the embodiment of the presentinvention;

FIG. 57 is a diagram showing a voltage distribution of a common gateline at each output in the case in which a current flows to the commongate line and in the case in which a current does not flow to the commongate line;

FIG. 58 is a diagram showing a distribution of an output current at eachterminal in the case in which a current flows to a common gate signalline;

FIG. 59 is a diagram showing a range of a resistance value, which isnecessary for a gate signal line, with respect to a reference currentvalue;

FIG. 60 is a diagram showing characteristics of a gate voltage and adrain current of a distributing mirror transistor;

FIG. 61 is a diagram showing an example of a wiring method forincreasing a resistance of a gate signal line;

FIG. 62 is a diagram showing an example in which resistance elements areconnected in parallel to perform cascade connection in a secondembodiment;

FIG. 63 is a diagram showing a case in which a temperature compensationfunction is provided in the structure of FIG. 1;

FIG. 64 is a diagram showing an external wire bound in the case in whichtwo or more driver ICs are connected in cascade;

FIG. 65 is a diagram showing a reference current generation unit in adriver IC of performing multicolor output;

FIG. 66 is a diagram in which two different ICs are used in FIG. 1;

FIG. 67 is a diagram showing an example of a circuit in whichfluctuation in two reference currents is reduced in two referencecurrent generation units in the case in which the second embodiment isimplemented using plural driver ICs;

FIG. 68 is a block diagram for performing control of a driver IC of thepresent invention according to button input of the personal digitalassistant shown in FIG. 14;

FIG. 69 is a diagram showing a method of reducing power consumption bydisconnecting a reference current from the first embodiment of thepresent invention;

FIG. 70 is a diagram showing a case in which resistors of differentdriver ICs are also used in a constant current source circuit shown inFIG. 31;

FIG. 71 is a diagram showing a circuit at the time when a function isprovided for allowing a value of a resistor to be changed by a trimmingoperation in the constant current circuit shown in FIG. 70;

FIG. 72 is a diagram showing an example of connection of a referencecurrent generation unit using an electronic volume in the case in whichplural driver ICs are used;

FIG. 73 is a diagram showing a circuit of one reference currentgeneration unit in the second embodiment;

FIG. 74 is a diagram showing a pixel circuit using a current copier inthe case in which an n type transistor is used;

FIG. 75 is a diagram showing an output stage of a driver IC in the casein which the n type transistor is used in a pixel circuit;

FIG. 76 is a diagram showing a schematic circuit of a driver IC of thepresent invention in a display device in which the n type transistor isapplied to a pixel;

FIG. 77 is a diagram showing a reference current generation unit in thecase in which the n type transistor is applied to a pixel circuit and amethod of distributing a voltage, based on which a reference current isgenerated, to plural driver ICs;

FIG. 78 is a diagram showing a concept of distributing a referencecurrent to each output;

FIG. 79 is a diagram showing a circuit of distributing a referencecurrent;

FIG. 80 is a diagram showing a connection relation of plural driver ICsin an embodiment of distributing a reference current to each output; and

FIG. 81 is a diagram showing a relation between a period in which apre-charge voltage is applied within one horizontal scanning period anda period in which a current based upon gradation data is outputted.

DESCRIPTION OF SYMBOLS

-   10 Reference current generation unit-   11 Resistance element-   12 Operational amplifier-   13 Transistor-   14 Current output stage-   15 Reference voltage signal line-   16 External wiring-   17 Driver IC-   18 Current output-   19 Reference current line

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be hereinafter described withreference to the drawings.

A structure of a current output type source driver IC 17 in anembodiment of the present invention is shown in FIG. 23. In thisexample, the current output type source driver IC 17 is a driver withthe number of stages of a shift register of 160 and having 160 outputs.Since the number of outputs can be realized simply by increasing andreducing the numbers of shift registers 231, latch units 232, currentoutput stages 236, pre-charge voltage application judgment units 233,and current output/pre-charge voltage selection units 235, which arerequired for one output, according to an increase and a decrease of thenumber of outputs, it is possible to cope with an arbitrary number ofoutputs. However, if the number of outputs increases, since a chip sizebecomes too large and general versatility is lost, about 600 is themaximum practically.

In the structure of FIG. 23, an input of a video signal 239 isdistributed to each output terminal by the shift register unit 231 andtwo latch units 232. The distributed video signal is inputted to thecurrent output stage 236 and the pre-charge voltage application judgmentunit 233. In the current output stage 236, a current value correspondingto a gradation is outputted from the video signal and a referencecurrent which is generated by the reference current generation unit 237.On the other hand, in the pre-charge voltage application judgment unit233, a signal is generated for judging by the video signal whether acurrent corresponding to a gradation is outputted or a pre-chargevoltage is outputted. A current or a voltage is outputted to the outsideof the drive IC 17 via thecurrent-output/pre-charge-voltage-selection-unit 235 which selectsaccording to the output signal of the pre-charge voltage applicationjudgment unit 233 whether to output a current according to thegraduation or to supply a voltage from the pre-charge power supply 234.

The voltage outputted from the pre-charge power supply 234 turns into avoltage value necessary for displaying black on a display panel. Amethod of applying this pre-charge voltage is a configuration peculiarto the driver IC 17 of performing gradation display on an active matrixtype display device according to a current output. Note that, in adriver IC for a passive matrix, the pre-charge voltage applicationjudgment unit 233, the pre-charge power supply 234, and the currentoutput/pre-charge voltage selection unit 235 are unnecessary.

For example, a case in which a predetermined current value is written ina certain pixel from a source signal line in an active matrix typedisplay device of a pixel structure shown in FIG. 7 will be considered.An equivalent circuit of one pixel in this case is as shown in FIG. 9(a), and an extracted circuit relating to a current path from the outputstage of the source driver IC 17 to the pixel in the case in which apre-charge circuit is not present is as shown in FIG. 24( a).

A current I corresponding to a gradation flows from the inside of thedriver IC 17 as a lead-in current in a form of a current source 242.This current is taken into the inside of the pixel 74 through a sourcesignal line 60. The taken-in current flows through the drive transistor72. In other words, the current I flows to the source driver IC 17 fromthe EL power supply line 64 via the drive transistor 72 and the sourcesignal line 60 in the selected pixel 74.

When a video signal changes and a current value of the current source242 changes, a current flowing to the drive transistor 72 and the sourcesignal line 60 also changes. At that point, a voltage of the sourcesignal line changes according to a current-voltage characteristic of thedrive transistor 72. In the case in which the current-voltagecharacteristic of the drive transistor 72 is FIG. 24( b) for example,when it is assumed that a current value flown by the current source 242has changed from I2 to I1, a voltage of the source signal line changesfrom V2 to V1. This change in the voltage is caused by the current ofthe current source 242.

A stray capacitor 241 is present in the source signal line 60. In orderto change the source signal line voltage from V2 to V1, it is necessaryto draw a charge of this stray capacitor. A time ΔT required for thisdrawing is ΔQ (the charge of the stray capacitor)=I (a current flowingto the source signal line)×ΔT=C (a stray capacitance value)×ΔV. Here,when it is assumed that ΔV (a signal line amplitude in a black displaytime from a white display time) is 5[V], C=10 pF, and I=10 nA, ΔT=50millisecond is required. This means that, since the time is longer thanone horizontal scanning period (75 μsec) at the time when QCIF+size (thenumber of pixels 176×220) is driven at a frame frequency of 60 Hz, if itis attempted to perform black display on a pixel below a white displaypixel, switch transistors 73 a and 73 b of writing a current in a pixelclose while a source signal line current is changing, and thereforehalftones are memorized in the pixel, whereby the pixel glistens atluminance between white and black.

A value of I decreases as a gradation becomes lower, and it becomesdifficult to draw the charge of the stray capacitor 241, there is aproblem in that a signal before the luminance changes to a predeterminedluminance is written inside the pixel. This problem occurs moreconspicuously in display of a lower gradation. To put it in an extremeway, a current of the current source 242 at the time of black display is0, and it is impossible to draw the charge of the stray capacitor 241without flowing a current.

Therefore, a structure in which a voltage source with an impedance lowerthan that of the current source 242 is prepared to apply the voltagesource to the source signal line 60 as required is adopted. This voltagesource is equivalent to the pre-charge power supply 234 of FIG. 23, anda mechanism for allowing application of the voltage source is 235.

A schematic circuit with respect to one source signal line 60 is shownin FIG. 25. A voltage supplied from the voltage generation unit 234 isapplied to the source signal line 60, whereby the charge of the straycapacitor 241 can be charged and discharged. As the voltage suppliedfrom the voltage generation unit 234, a voltage corresponding to eachgradation current may be supplied according to the characteristics ofFIG. 24( b). However, a circuit size increases because a digital/analogconversion unit corresponding to the gradation data 115 is required alsoin the voltage generation circuit, and the drive transistor 72 hasfluctuation in characteristics for each pixel, therefore, thecorresponding voltage is different with respect to an identicalgradation current. Therefore, even if a voltage corresponding to agradation is outputted by providing the digital/analog conversion unit,a predetermined current is not written, and it is necessary to correct acurrent to the predetermined current with the current source 116 afterthat.

Consequently, it can be said that it is practically sufficient in termsof cost (chip area) versus effect to generate only a voltagecorresponding to a black gradation, for which it is most difficult towrite a current value, as the voltage to be generated in the voltagegeneration unit 234.

Operation timing within one horizontal scanning period of the switches251 and 252 is shown in FIG. 81. At the beginning of the horizontalscanning period, a pre-charge voltage from the voltage generation unit234 is applied in order to reset the charge of the stray capacitor 241(a period 811). Since the charge is reset by a voltage, the object isattained even if this period is short. Thus, this period only has to beabout 2 μsec at the maximum. Next, in a period 822, only the switch 252is brought into a conduction state to supply a current corresponding toa gradation to the pixel 74. Note that since an operation for writing apredetermined current value in the period 822 is slow, and it is desiredto secure the period 822 as long as possible, it is necessary to limitthe period 811 to about 10% of a maximum one horizontal scanning period.

Moreover, by using an output of the pre-charge voltage applicationjudgment unit 233 as a control mechanism for the switch 251, it becomespossible to select whether or not a pre-charge voltage is inputtedaccording to a value of input gradation data (select pre-chargefunction).

Since the voltage value to be outputted from the voltage generation unit234 is only the voltage corresponding to the current at the time of ablack gradation (hereinafter referred to as black voltage), for example,in the case in which it is assumed that the gradation data 115 displaysa white gradation for continuous plural horizontal scanning periods, asource signal line repeats black, white, black, and white states. Ifpre-charge is not performed, the white state occurs continuously. Inother words, on the contrary, by performing pre-charge, a change in asignal line is intensified, and in addition, it is likely that displayis not fully white depending upon a current at the time of whitedisplay, and insufficiency of a writing current is caused.

Thus, it is sufficient to use the pre-charge judgment unit 233 such thatpre-charge is not performed in a gradation for which a relative largeamount of current flows and only a gradation, for which a current hardlychanges to a predetermined current, near the black gradation is assistedby the pre-charge power supply 234. For this purpose, the pre-chargevoltage application judgment unit 233 is provided in each output suchthat an operation of the switch 251 can be changed according to a valueof the gradation data 115. It is most effective that a judgment outputhas a period in which a pre-charge voltage is inputted only at the timewhen a gradation is 0 (black), and a pre-charge voltage is not inputtedat the time of display in other gradations. By setting luminance at thetime of a lowest gradation to be low, contrast increases, and it becomespossible to display a more beautiful picture.

In an organic luminance element which is used as a display element,since an element structure is different for each luminescent color, anda carrier injection efficiency, carrier mobility, a quantum effect of aphosphor, and the like vary, it is likely that a luminescence startcurrent varies for each luminescent color.

An example is shown in straight lines 261 to 263 indicatingcorrespondence of a current and luminance of FIG. 26. Green, blue, andred emit light when a current of I1 or more, I2 or more, and I3 or moreis flown, respectively. Then, even if it is assumed that there is nofluctuation in the drive transistor 72 of the pixel 74, a black voltagevaries from V1 to V3 for each display color as shown in FIG. 24( b).Since a longer time is required until a current changes to apredetermined current as the current becomes lower, if it is attemptedto set a pre-charge voltage with one power supply, the entire voltage ofV1 is applied to all elements.

In this way, although black floating blurry glistening at the time ofblack display is eliminated, when it is attempted to display white nexttime, it is necessary to change a voltage more in a red display pixel bya voltage of (V3−V1) compared with the case in which there is nopre-charge. Therefore, when white display is performed next time, aproblem occurs in that the color changes to white less easily by adegree of increased voltage change.

Thus, the pre-charge power supply 234 is provided separately for eachdisplay color. A block diagram is shown in FIG. 27. Here, a descriptionwill be made assuming that R, G, and B are output stored, green, andblue luminance elements, respectively. Note that display colors may bethree colors of cyan, yellow, and magenta rather than three primarycolors of red, green, and blue.

Three outputs of the voltage generation unit 234 are provided. Output271, 272, and 273 perform outputs to source signal lines of R, G, and B,respectively. In this case, an output voltage of 271 is set so as to besubstantially equal to a voltage of the source signal line 60 at thetime when the drive transistor 72 of the pixel 74 flows the current of13. The outputs 272 and 273 only have to output values substantiallyequal to voltages of the source signal line 60 at the time when thecurrents of I1 and I2 flow to the pixel transistor 72, respectively.Consequently, a proper voltage value can be directly applied to a pixelfor each display color.

Therefore, a source signal line potential to be changed at the time ofcurrent output may be low, it is possible to change a current to apredetermined current value in a shorter time, and a structure in whichinsufficiency of writing occurs less easily is obtained.

Incidentally, in a pattern in which there is no change in a sourcesignal line such as black display on the entire screen, if a pre-chargevoltage is applied only at the beginning of one frame, thereafter, apredetermined gradation flows sufficiently only with black current.

That is, even at the time of same black display, a time during which acurrent changes to a predetermined current value only with the currentis different depending upon a current value flown to the source signalline in the previous horizontal scanning period, and as an amount ofchange increases, the change takes longer time. For example, although ittakes time to perform black display after white display, in the case inwhich black display is performed after black display, since a change ina signal line is only a change by fluctuation in the drive transistor72, a time required for the change is short.

Thus, a signal for judging whether or not to apply a pre-charge voltage(pre-charge judgment signal 281) in synchronization with gradation data239 is introduced for each color, whereby it is also possible toimplement a structure in which presence or absence of pre-charge can beselected in an arbitrary gradation or in an identical gradation.

A structure of the driver IC 17 in this case is shown in FIG. 28. Thepre-charge judgment signal 281 is applied to the gradation data 239.Following this, since latch units 282 are also required to latch apre-charge judgment signal, latch units of the number equivalent to thenumber of video signal bits+one bit are provided.

Whether a pre-charge voltage is applied or a current corresponding to agradation is outputted is determined by the current output/pre-chargevoltage selection unit 235 according to a pre-charge judgment signalline 285 and a pre-charge ON/OFF signal 229. When both of pre-chargeON/OFF signal 229 and a signal sent on the pre-charge judgment signalline 285 allow to perform pre-charge are inputted, a voltage suppliedfrom the pre-charge power supply 234 is outputted to 18. In otherperiods, a current from a current output stage is outputted to 18.

For example, FIG. 29( a) shows an example in which pre-charge isinputted when a gradation is 0, FIG. 29( b) shows an example in whichpre-charge is inputted when a gradation is 0 and 1, and FIG. 29( c)shows a case in which pre-charge is inputted when a gradation is 0 andwhen a gradation in the previous period is not 0 (pre-charge isperformed when a gradation is 0 but, even if a gradation is 0,pre-charge is not performed if it continues).

This method has an advantage that, unlike the method mentioned above, itcan be selected whether or not pre-charge is performed according to astate of a source signal line of one horizontal scanning period earliereven in an identical gradation.

Note that this pre-charge judgment signal is supplied from a control IC283. According to a command operation of the control IC 283, thepre-charge judgment signal 281 can be outputted with a pattern thereofchanged as shown in FIGS. 29( a) to (c).

It is possible to change setting of pre-charge flexibly from the outsideof the source driver IC 17 depending on a capacity of the source signalline or a length of one horizontal scanning period, and there is anadvantage that general versatility increases.

FIG. 30 is a diagram showing a reference current generation circuit. Areference current defines a current value per one gradation in thestructure of the output stage shown in FIG. 11. Therefore, unlessfluctuation in the reference current 19 for each driver IC 17 is notsmall, block unevenness occurs in boundaries of ICs.

Thus, a structure of a reference current generation circuit subjected tofeedback as shown in FIG. 30 is adopted. In this circuit, the referencecurrent 19 is a value found by dividing a potential difference between apower supply 305 and a reference voltage signal line 304 by a resistanceelement 301. Fluctuation in the current 19 depends upon fluctuation inthe resistance element 301 and an input deviation of an operationalamplifier 302.

The fluctuation in the resistance element 301 can be controlled to about0.5% if a commercially available chip resistance element is used.

On the other hand, an input deviation of the operational amplifier 302is about 15 mV. Influence of an output deviation can be reduced byincreasing a potential difference between both ends of a resistorcompared with 15 mV. For example, if a structure in which a potentialdifference is 2 V or more is adopted, it becomes possible to controlfluctuation due to an output deviation to 0.75% or less.

In this way, a current source, in which fluctuation in a referencecurrent among the driver ICs 17 is controlled to 1% or less, is formed.

Moreover, by adopting a structure as shown in FIG. 31, this power supplycan compensate for a temperature characteristic and change a referencecurrent value in a programmable manner.

As the compensation of a temperature characteristic, it becomes possibleto change a reference current value by providing a temperaturecompensation element 311 in parallel with the resistance element 301 tochange a resistance value according to temperature, and it is possibleto compensate for a temperature characteristic of an organic luminanceelement. The organic luminance element slightly has temperaturedependency in a current to luminance characteristic, and luminancedecreases as temperature rises. Thus, if a combined resistance of 301and 311 is reduced by the temperature compensation element 311 such thatan amount of current increases when temperature rises, a temperaturecharacteristic can be compensated for.

In addition, since a voltage adjustment unit 315 is provided, a voltagevalue of the reference voltage signal line 304 can be changed accordingto a value of the control data 313, and a reference current changes.

This function makes it possible to, for example, in a semiconductorcircuit incorporated in the display device of the personal digitalassistant of FIG. 14, flow the predetermined reference current 19 at thetime of input to a key 142, lower the reference current after a fixedtime to decrease luminance of the display panel, and reduce powerconsumption of the display panel and the semiconductor circuit in orderto lengthen a life of a battery of the personal digital assistant.

A circuit block for realizing this is shown in FIG. 33. Detecting means333 of detecting key input is provided with respect to operation keys tojudge whether key input has been performed. A result of the judgment issent to a control IC 335. The control IC 335 rewrites a value of thecontrol data 313 which controls a generated current value of thereference current generation unit 331 of the source driver IC 17.Consequently, it becomes possible to change a reference current value tobe generated according to whether key input has been performed. If acounter function is provided in the control IC 335, it also becomespossible to return the reference current value to the original settingafter a fixed time.

Similarly, in the case in which it is desired to change luminance of thedisplay panel according to extraneous light in order to improve visualrecognition, it also becomes possible to rewire a value of the controldata 313, which sets a reference current, on the basis of a result ofdetection of light intensity detecting means 334, and realize reductionof power consumption by increasing luminance under strong extraneouslight and decreasing luminance in the dark.

In the case in which plural chips are arranged side by side in onedisplay device, it becomes possible to rewrite control data of onedriver IC 17 by performing connection of a reference current generationunit as shown in FIG. 32 to change a reference current of all of theother driver ICs 17. This method reduces fluctuation in a referencevoltage among the chips by connecting an output of the voltageadjustment unit 315 in one driver IC 17 to the reference voltage signalline 304 of all the driver ICs 17 in an identical display panel.Moreover, since only one driver IC 17 is sufficient for inputs of thecontrol data 313 and the reference voltage 324, winding of wiring of anexternal input signal line decreases, and it becomes possible to reducea frame of the display panel. In addition, this system of distributing avoltage is effective because there is no fluctuation compared with aconventional method of distributing a reference current to each driver.This is because it is difficult to distribute an identical current butit is easy to distribute an identical voltage.

In this way, it becomes possible to supply a reference current amongdriver ICs without fluctuation.

Next, a structure of an output stage will be considered.

A current output unit of the driver IC 17 of this embodiment has astructure as shown in FIG. 34. The structure is different from thestructure of FIG. 11 in that the reference current 19 is supplied fromboth ends of an output stage. The digital/analog conversion unit 116,which converts video signal data into an amount of output current, has astructure of FIG. 35, for example, in the case of 6 bit data. Here, thecurrent source for gradation display 113 is outputted using the numbercorresponding to a weight of bits. However, a method of increasing achannel width instead of the number may be adopted.

In addition, the common gate line 117 is formed of a material having ahigh resistance. Consequently, even in the case in which there is achange 211 a in a threshold voltage of a transistor at both ends of achip as shown in FIG. 36( a) it becomes possible to vary a potential ofthe common gate line 117 at the left and right ends of the chipaccording to a wiring resistance of the common gate line 117 (see astraight line 361 in the figure). As a result, a gate voltage at theright end, which conventionally has been Vg1, can be increased to Vg2.Since an output current value depends upon a gate voltage, a currentoutput changes from 211 b to 362 when the structure of FIG. 11 adopted.Consequently, it becomes possible to make current values at the left andright equal.

Since current outputs at the left and right ends of an identical chipare equal, and a reference current defining a current value per onegradation can be supplied without fluctuation among chips, eliminationof block unevenness, which tends to occur in boundaries of the driverICs 17, can be realized.

A schematic block diagram of a driver IC in that case is shown in FIG.37.

The current output stage 236 is constituted by a current mirror. Inorder to cope with a gentle change of a transistor characteristic in awafer, the common gate line 117 is constituted by a high resistancematerial. A reference current generation unit of supplying a current toleft and right ends of a chip has a structure as indicated by 371,fluctuation at the left and right can be controlled to about 0.7% at themaximum. It is also possible to further reduce the fluctuation if aresistor with small fluctuation is used for an externally attachedresistance 301 to be used. Outputs of the voltage adjustment unit 315having different output voltage values are inputted to left and rightoperational amplifiers 12 of the reference current generation unit 371according to the control data 313, whereby left and right referencecurrents 19 a and 19 b are made equal, and it becomes possible to changethe reference currents simultaneously according to the control data 313.

After a delay in external wiring is adjusted and synchronized with aninternal circuit by a timing adjustment unit 238, an input video signal239 is distributed to each output terminal according to an output of thebi-directional shift register 231 and latched in the latch unit 232 oftwo stages in order to maintain a horizontal scanning period value. Thelatched video signal data is inputted to the current output stage 236.

The current output stage 236 distributes the reference current 19 toeach output with a current mirror structure. In this figure, atransistor of a mirror source is 112, and a transistor of flowing adistributed current is 113.

The distributed current is outputted via the switch 118 which isprovided on a drain side of the current source for gradation display 113of turning ON/OFF the switch on the basis of data outputted from thelatch unit 232. In this example, since one bit is used, the switch 118is OFF when the data is 0, and a current for one transistor of 113 flowsas an output current when a current is 0 and the data is 1. This currentvalue is determined according to a mirror ratio with the transistor of112 and a reference current value. Note that, other than one bit, if acircuit having the structure of FIG. 35 is arranged in each output, itis also possible to perform an output of six bits and 256 gradations.

The current output is further inputted to the current output/pre-chargevoltage selection unit 235. This is for performing charging anddischarging of a charge with a voltage source at the time of lowgradation display shown in FIG. 24 to cope with the difficulty inchanging a charge of a stray capacitor with a micro current. There is aswitching unit which can select which of an output from the pre-chargepower supply 234 and a current output of the current output unit isoutputted. Note that, other than the structure of FIG. 37, thisswitching unit may be provided with two switches as indicated by 251 and252 of FIG. 25. These switches may be provided with a function ofperforming high impedance output for electrically separating the driverIC 17 and the display panel.

Fluctuation in an output current for each terminal occurs depending upona transistor size of the current source for gradation display 113 ofperforming current output. A relation between a transistor size (channelarea) and fluctuation in an output current is shown in FIG. 38. Since itis necessary to reduce fluctuation between adjacent terminals in a chipand among chips to be 1% or less taking into account fluctuation in areference current, it is desirable to reduce fluctuation in an outputcurrent in FIG. 38 (fluctuation in a current in an output stage) to 0.5%or less, and it is advisable to set a transistor size of the currentsource for gradation display 113 to 30 square microns or more.

Note that, in FIG. 37, a judgment signal for judging whether or notpre-charge is performed is not shown because the figure only shows theentire structure. Two kinds of structures shown in FIGS. 23 and 28 arepossible and a circuit of controlling a switch according to a latch unitand a pre-charge pulse is provided when the structure of FIG. 23 isadopted. In FIG. 28, a structure only has to be adopted in which one bitsignal is increased with respect to a video signal of each color, and aswitch is controlled according to a latch output and a pre-charge pulseincreased by one bit.

When display as shown in FIG. 39 is performed using the current driverIC 17 constituted as described above, a phenomenon, in which luminancein a row indicated by 394 is high compared white display of other rowsand luminance in a part indicated by 395 is low compared with whitedisplay of other rows, tends to occur.

The part 394 where luminance is high (called luminescent line in thiscontext) appears in a row where the number of terminals of outputting ablack signal decreases in the terminals of the driver IC 17. The part395 where luminance is low (called black line in this context) appearsin a row where the number of terminals of outputting a black signalincreases in the terminals of the driver IC 17.

In the display device having the pixel structure as shown in FIG. 7 or8, a voltage of a source signal line connected to an output terminal ofthe driver IC 17 has a voltage waveform as shown in FIG. 40 in a signalline (column) 396 and a signal line (column) 397 of FIG. 39. Here, Vb isa voltage at the time when a pixel displays black, and Vw is a voltageat the time when a pixel displays white.

As shown in FIG. 40( a), a voltage waveform of a source signal linecorresponding to the column 396 outputs a voltage indicating black in aperiod 401, outputs a voltage indicating white in a period 402, andoutputs a voltage indicating black in a period 403 in association withan image shown in FIG. 39.

On the other hand, as shown in FIG. 40( b), a voltage waveform of asource signal line corresponding to the column 397 outputs a voltageindicating white in all periods of one frame. In this case, in a displayperiod of the row 394, a hazard occurs in a direction in which a voltagefalls, and luminance further increases. In a display period of the row395, a hazard occurs in a direction in which a voltage rises, andluminance further decreases. As a result, in the row 394 of FIG. 39, aluminescent line appears because luminance is high compared with othertime of white display, and in the row 395, a black line appears becauseluminance is low compared with other time of white display.

A factor causing a hazard in such a source signal line voltage will beexplained.

A circuit at the time when the output stage circuit of the driver IC 17and the pixel 74 of the display panel unit are connected is shown inFIG. 41. In this example, only two columns corresponding to the columns396 and 397 are shown. Note that, although the explanation will be madeassuming that gradation data is two bits here, in general, the sameexplanation is possible with N (N is a natural number) bits.

In the period 398 of FIG. 39, black data is outputted as gradation data413 a, and white data is outputted as gradation data 413 b.Consequently, switches 118 a and 118 b come into a non-conduction state,and switches 118 c and 118 d come into a conduction state. As a result,a drain voltage of the transistor 113 takes a value close to a groundpotential of the driver IC 17 (a voltage Vdb shown in FIG. 40) in nodes411 a and 411 b and takes a value equal to a potential Vw of a sourcesignal line 60 b in 411 c and 411 d. A potential of a source signal line60 a is Vb. When black is written in a pixel 74 a, since the switches118 a and 118 b are in a non-conduction state, the source signal line 60a is in a state in which it is disconnected from the driver IC 17.

In the inside of the pixel 74 a, the transistors 73 a and 73 b arebrought into a conduction state, and the transistor 73 c is brought intoa non-conduction state by an operation of the gate signal line 61. Inaddition, all the other pixels connected to the source signal line 60 aare brought into a state in which the pixels are electricallydisconnected from the source signal line by an operation of the gatesignal line. The source signal line 60 a is in a state in which it isconnected to the power supply 64 via the transistor 72. Since there isno path through which a current flows via the transistor 72, a drainpotential of the transistor 72 is increased such that a current does notflow. Therefore, the voltage Vb is substantially equal to the powersupply voltage 64.

In this state, as shown in FIG. 42, only the gradation data 413 a ischanged to a white signal. Then, the switches 118 a and 118 b come intoa conduction state. At that instance, a potential of 411 a and 411 brises to a potential of the source signal line 60 a. This changepropagates to the common gate signal line 117 as a capacitive couplingvia a capacitor 412 which is parasitic on the transistor 113. As aresult, as shown in FIG. 42, a period 421 in which a gate voltage risesin a hazard-like manner appears. Since the all the output transistors113 outputs a current on the basis of a voltage of the identical commongate signal line 117, a hazard of the gate signal line affects all thedriver outputs 18.

Since the data 413 b does not change, a state of the switches 118 c and118 d does not change. However, since the voltage of the gate signalline 117 has changed as in the period 421, an output current changes asindicated by 422. If a period 423, in which a current value differentfrom a predetermined current value Iow is outputted, is long comparedwith one horizontal scanning period, a current value, which is writtenin the pixel 74 regulated when a pixel circuit is separated from asource signal line by the gate signal line 61, becomes large comparedwith Iow. Thus, luminance, which is high compared with a predeterminedluminance, is outputted from the EL element 63.

Similarly, in the case in which the gradation data 413 a has changedfrom white to black, immediately after the switches 118 a and 118 bclose, a voltage of 411 a and 411 b changes from Vdw to Vdb, and thischange propagates to the common gate signal line 117 through the straycapacitor 412, where by a gate voltage falls as in a period 424, and acurrent flowing to the switch 118 b also falls. Consequently, similarly,if this hazard occurs for one horizontal scanning period or more, apixel corresponding to a period in which the hazard occurs performsdisplay at luminance which is low compared with a predeterminedluminance.

Thus, in this embodiment, as a method of eliminating a luminescent lineand a black line, three methods will be explained roughly. As a firstmethod, swing in the gate signal line 117 is controlled. As a secondmethod, a drain potential of the transistor 113 at the time of blackdisplay is increased to reduce an amount of voltage change at the timeof data change which causes the swing in the gate signal line 117. As athird method, a change of an output current is reduced in response to achange of a voltage of the gate signal line 117 such that, even if thegate signal line swings, the swing does not effect an output. The threemethods will be explained in order in conjunction with the drawings.

FIG. 44 is an embodiment of the first method. Compared with FIG. 34, theembodiment is characterized in that the number of the distributingmirror transistors 112, which decides a potential of the gate signalline 117, is increased. Consequently, since a mirror ratio changes, acurrent value of the reference current input 19 is also increasedaccording to the change.

An enlarged version of the hazard part 421 of a gate potential of FIG.42 is shown in FIG. 43. In the structure of FIG. 34, there is a changeof a gate voltage as indicated by a curve 431, and the gate voltage doesnot return to a predetermined voltage within one horizontal scanningperiod. Here, when the number of the mirror transistors 112 isincreased, a change indicated by a curve 432 occurs. When the number ofthe mirror transistors 112 is further increased, a change indicated by acurve 433 occurs. In the case of the curve indicated by 433, since thegate voltage returns to the predetermined voltage value within thehorizontal scanning period, a predetermined current value is written ina pixel.

Note that this can also be realized by increasing a size of thedistributing mirror transistor 112 instead of increasing the number ofthe distributing mirror transistors 112.

It is desirable that a size of the distributing mirror transistor 112 isa size indicated by a range 451 of FIG. 45. That is, the range is arange in which a rate of change of a gate voltage is equal to or lowerthan an allowable level. This allowable level indicates a voltagefluctuation level at which a change of an output current is within 1%taking into account the fact that a luminance difference from the otherrows cannot be visually recognized if an amount of change of outputcurrent is within 1%. Since fluctuation of a voltage (indicated by acurve 462 in FIG. 46) occurs via a stray capacitor of the transistor113, the fluctuation depends upon a channel area and the number ofcurrent source for gradation displays. Therefore, a total size of thedistributing mirror transistor 112 is defined by a ratio with respect toa total size of the transistor 113.

As a result of preparing various sizes and the numbers of distributingtransistors and performing evaluation, a relation between (a channeltotal area of the distributing mirror transistor 112)/(a channel totalarea of the current source for gradation display 113) and a gate changerate was represented by a curve shown in FIG. 45.

According to this graph, a luminescent line and a black line areeliminated if the channel total area of the distributing mirrortransistor 112 is 1% or more, preferably 5% or more of the channel totalarea of the current source for gradation display 113. On the other hand,if the ratio is 50% or more, a rate of change of a gate voltage does notdecrease. Therefore, with the ratio of 50% or more, in whatever area thedistributing mirror transistor 112 is designed, the area does not affecta hazard. It is preferable to set the ratio to 50% or less from theviewpoint of reducing a chip area.

Thus, the distributing mirror transistor 112 only has to be designedsuch that the channel total area thereof is 1% or more and 50% or less,preferably 5% or more and 50% or less of the current source forgradation display 113 as in the range 451.

Note that, in order to control fluctuation of a ratio a referencecurrent and a certain gradation output current among chips, it isdesirable to design the distributing mirror transistor 112 and currentsource for gradation display 113 in an identical size and with anidentical layout. It is advisable to realize the above-described arearatio according to an increase or a decrease of the number oftransistors. Consequently, even in a display device in which the pluraldriver ICs 17 are arranged and used, since fluctuation among chips of aratio of an output current with respect to a reference current isreduced, display without block unevenness can be realized.

For example, in the case of a driver IC with 63 gradation display and160 outputs, sixty-three transistors 113 are arranged in one output. Anoutput stage, in which sixty-three transistors 113 are arranged, isprepared by the number of outputs, that is, 160. Moreover, nine outputstages are prepared at both ends of the 160 outputs, respectively, anddrain gates of the transistors are shorted, whereby sixty-three mirrortransistors 112 are formed. A circuit in this case is shown in FIG. 47.Consequently, since a current mirror can be formed with a substantiallyidentical layout and in an identical channel size, fluctuation of amirror ratio among the chips can be reduced. A ratio of a channel totalarea of a distributing mirror transistor and a channel total area of acurrent source for gradation display in this case is 18/160=0.11, and aluminescent line and a black line do not occur. In general, it isdesirable to arrange rows of transistors for mirror and rows of outputstages 116 in the case of N outputs as shown in FIG. 48. The numbers ofrows 481 a and 481 b of the transistors for mirror are equal andarranged in a range shown in FIG. 45 according to the number of outputstages.

In FIG. 48, the arrangement is shown in the case of monochrome. However,in a color panel, an arrangement as shown in FIG. 49 is adopted. In thisexample, red, green, and blue were used as three primary colors, and acommon gate line and a distributing mirror transistor were preparedindependently for each color such that a current per one gradation couldbe set independently for each color. R, G and B are affixed to the endsof reference characters for circuits for red display, circuits for greendisplay, and circuits for blue display, respectively. As the common gatesignal lines, 491 a, 491 b, and 491 c were prepared for red display,green display, and blue display, respectively. Consequently, since agate potential of the current source for gradation display 113 can beset to a different value for each color, it becomes possible to adjustwhite balance and a maximum luminance according to a current-luminancecharacteristic and chromaticity coordinates value of a display elementto be used. A reference current is inputted from two positions on theleft and right for each color, that is, six positions in total. Threetimes as many reference current generation units are prepared.

In the rows 481 of the transistors for mirror consisting of pluraldistributing mirror transistor groups 470 for an identical color, thetransistors are arranged with three primary colors of red, green, andblue as one set, and the number of sets are increased rather thanarranging the transistors as a set for each color as shown in FIG. 49.Consequently, since the transistors arranged over a wide range, itbecomes possible to reduce influence of a local change of a thresholdvoltage. In addition, deviation of a mirror ratio for each color is alsoeliminated. In FIG. 49, the transistors indicated by CS(R) belong to thedistributing mirror transistor group 470 for red display, thetransistors indicated by CS(G) belong to the distributing mirrortransistor group 470 for green display, and the transistors indicated byCS (B) belong to the distributing mirror transistor group 470 for bluedisplay.

Next, a second method will be explained.

The second method is a method of reducing an amount of change of thedrain voltage of the current source for gradation display 113 whichcauses fluctuation of a voltage of the common gate line 117. By reducingthe amount of change, it becomes possible to reduce an amount of changeof the gate line 117, which changes a capacitive coupling, as well.

A circuit of the digital/analog conversion unit 116 and the distributiontransistor for one output is shown in FIG. 50. In this example,gradation data is assumed to be six bits. It is a characteristic of thepresent invention that a circuit indicated by 502 is added. Switches 118f and 503 are complementarily operated, whereby the node 411 isconnected to a source signal line or a transistor 501, and it becomespossible to always flow a current to the current source for gradationdisplay 113.

In a conventional method, when the switch 118 comes into anon-conduction state, since the transistor 113 attempts to flow acurrent regardless of the fact that there is no current path throughwhich a current flows to the transistor 13, a drain voltage is reduced.As a result, a potential of 411 falls to a ground potential of a driverIC in a case in which the potential is the lowest.

On the other hand, in this embodiment, even if the switch 118 isnon-conductive, the switch 503 comes into a conduction state, and acurrent is supplied from the power supply 504 to 113 via the transistor501. It is possible to increase a voltage of 411 in which case to apotential of Vb1 shown in FIG. 51, although depending upon a channelsize of the transistor 501 and a voltage of the power supply 504 (aconventional potential is Vdb. Here, Vb1>Vdb) Consequently, a change ofa potential of the node 411 due to ON/OFF of the switch 118 decreases,whereby it becomes possible to reduce fluctuation of a potential of thecommon gate line 117 which fluctuates via a stray capacitor.

There is more effect if a gate voltage to drain current characteristicof the transistor 501 connected as a diode is made uniform with that ofthe drive transistor 72 used in the pixel 74, or a transistor size withwhich a gate potential further falls is adopted.

In the case in which a current is supplied to the pixel 74 from thesource driver IC 17, an equivalent circuit of the pixel is changed asshown in FIG. 24 by an operation of the gate signal line 61. A drainelectrode of the driver IC 17 is connected to the power supply 64 viathe source signal line 60 and the drive transistor 72. It is seen that,in this case, a circuit of a part indicated by 502 and the circuit ofthe pixel 74 have an identical structure except a capacitor. (Since itis unnecessary to retain a gate voltage, a capacitor is unnecessary inthe circuit of 502.) Therefore, if the power supplies 501 and 64 as wellas the transistors 72 and 501 can be formed with identicalcharacteristics, it can be expected that a potential of the node 411 issubstantially uniform.

A potential of the source signal line changes according to a gradation.A lowest voltage is at the time of white (highest gradation), and ahighest voltage is in the case of a gradation 1. The potential changesbetween the lowest voltage and the highest voltage according to agradation. Therefore, if a potential of 411 at the time when the switch118 f is in a non-conduction state and 503 is in a conduction state isset within a range of a change of a voltage of the source signal line, achange of the potential at the time when the switch 118 f comes into aconduction state can be reduced. In the case of FIG. 50, a transistorsize of 501 is designed such that a voltage of 411 is within a range ofa change in the source signal line when a current corresponding to agradation 32 flows to 501.

In FIG. 50, a case in which the added circuit 502 is connected to a mostsignificant bit at the time of six bit gradation data is illustrated.However, in general, if a transistor size of the transistor 501 in theadded circuit 502 only has to be designed such that a gate voltage ofthe transistor 501 is within a variable range of a voltage, which thesource signal line 60 could take, when a current of a gradation (here,denoted by K), which matches the number of transistors connected to asignal line to which the added circuit 502 is connected, flows to 501,it becomes possible in general to control a change of a drain voltage ofa transistor which outputs the gradation K of J bit gradation data.

Therefore, in the case of FIG. 50, a circuit like 502 may be used forsignal lines from D[0] to D[4] as well.

In addition, as shown in FIG. 52, the circuit can be realized in thesame manner if a resistance element 521 is used instead of thetransistor 501. Further, if a circuit structure, in which a currentalways flows to the transistor 113 even if the switch 118 f comes into anon-conduction state, can be adopted, an element other than a resistorand a transistor may be used.

Next, a third method will be explained.

When a channel width/a channel length (hereinafter referred to as W/L)of the mirror transistor 112 of distributing a reference current ischanged, a characteristic of a drain current versus a gate voltagecharacteristic changes. As shown in FIG. 53, when W/L is reduced, achange of the drain current with respect to a change of a gate voltagedecreases.

Now, a value of the reference current 19 is assumed to be Id1. In thiscase, it is assumed that the common gate line 117 (here, matching a gatevoltage of the transistor 112) has changed by ΔVg at a point of a changein gradation data. As shown in FIG. 53, the change of the drain currentis smaller with W/L=0.3 compared with the case of W/L=1. Since atransistor 32 and a transistor 33 form a current mirror, this change ofthe drain current corresponds to a change of an output current of thetransistor 113. If the change of the drain current is small, appearanceof a luminescent line and a black line can be prevented even if avoltage of the common gate signal line 117 changes.

Thus, as shown in FIGS. 54( a) and (b), respectively, a rate of changeof an output current with respect to a difference of W/L was measured.(A channel area was fixed.) As a result, the change of the outputcurrent is within 1% with respect to fluctuation of a voltage of thegate line 117 when W/L is 0.6 or less. If an amount of current change iswithin 1%, a change of luminance cannot be visually recognized. Thus, adifference of luminance of white in the part indicated by 394 in FIG. 39and the other parts is unclear, a luminescent line is unseen. The sameis true for a black line.

When a value of W/L is reduced, a gate voltage necessary for obtainingan identical drain current rises. When W/L decreases to 0.01 or less,the gate voltage exceeds 1.5 V. A characteristic of a drain currentversus a source to drain voltage of the current source for gradationdisplay 113 (at the time when a current flowing to one current sourcefor gradation display 113 is about 10 nA to 100 nA) is indicated bycurves 553 and 554 of FIG. 55. Regardless of a load of an output, it isnecessary to operate the transistor 113 in a saturation region indicatedby a range 552 further to the right than a dotted line part in order tooutput a fixed current. In order to operate the transistor 113 in thesaturation region, a drain voltage higher than a gate voltage of thetransistor 113 is necessary. Therefore, when W/L decreases to 0.01 orless in FIGS. 54( a) and (b) and a gate voltage of 1.5 V or more isrequired, a drain voltage of 1.5 V is also required. If an operationmargin is taken into account, a drain voltage of about 2 V is required.Moreover, a source signal line voltage (=a drain voltage of 113) isdifferent according to a gradation signal, and an amplitude necessaryfor white to black levels is about 2 V. In addition, there is a voltageloss due to a wiring resistance and a switching ON resistance. In total,a necessary voltage is about 5 V. As the driver IC 17, a withstandingvoltage of a voltage level of this order is necessary.

On the other hand, in order to reduce a chip size of the driver IC 17, amicro process is used. For a cellular phone, functions of a memory and acontroller are further provided inside the driver IC 17. Since the microprocess is used, a withstanding voltage cannot be set large and can beincreased up to about 5 V at the most realistically.

From such a viewpoint, a lower limit value of W/L is determined by awithstanding voltage of an IC and cannot be reduced to be less than0.01. As a range which W/L can take, 0.01 or more and 0.6 or less isdesirable as indicated by a range 541 of FIG. 54. In this range, aluminescent line and a black line do not occur, and an effect ofreduction of a chip size by a micro rule can be expected.

Note that the first to the third methods may be implemented incombination. By combining the methods, there is an effect that anoperation margin increases, and a luminescent line and a black lineappear less easily.

In the embodiment of supplying the reference current 19 from both sidesin order to compensate for a change of a threshold voltage of atransistor in a wafer as shown in FIG. 34, when there is a change of thethreshold voltage of the transistor as shown in FIG. 21( a), a potentialis high on the right side of the common gate signal line 117 and is lowon the left side. Then, as shown in FIG. 56, a current Ig flows to thecommon gate line 117. A drain current of the distributing mirrortransistor 112 arranged on the left and right changes, and Is+Ig in themirror transistor 112 a because a current flowing in from a common gateincreases, and Is−Ig in the mirror transistor 112 b.

Since the drain current has changed, the common gate line 117 changes, avoltage on the left side where the drain current has increased rises,and a voltage on the right side where the drain current has decreasedfalls. As a result, a voltage of the common gate line 117 changes asindicated by a straight line 572 compared with the case in which Ig doesnot flow (straight line 571) as shown in FIG. 57.

Consequently, as indicated by a curve 581 of FIG. 58, an output currentat both the ends increases by an increase of a gate voltage to be Ia atthe left end and decreases by a decrease of a gate voltage to be Ib atthe right end. A difference of Ia−Ib is caused at both the ends. Whenplural driver ICs 17 are used to perform display in this state, it islikely that, in boundaries of the driver ICs 17, the boundaries are seenaccording to an amount of Ia−Ib.

In order to distribute the reference current 19 to an output stage moreaccurately, it is preferable that the output stages 116 and thedistributing mirror transistor groups 470 are arranged as shown in FIG.48. A structure of the output stage 116 and a structure of thedistributing mirror transistor group 470 in the case of a driver ofperforming six bit output are shown in FIGS. 35 and 47, respectively(other than six bits, the same effect is obtained if transistors 471 arearranged to agree with the number of the transistors 113).

FIGS. 35 and 47 are different only in presence or absence of theswitches 118 in drains of sixty-three n type transistors. Thus, if thetransistors 113 and 471 are laid out in a same arrangement, it ispossible to make a mirror ratio more accurate. In the case in which amirror ratio of a reference current and an output current is changed,the number of the distributing mirror transistor groups 470 to bearranged only has to be changed.

For example, in the case one distributing mirror transistor group 470 isarranged on both the sides, respectively, that is, two distributingmirror transistor groups 470 are arranged in total, a ratio of theoutput current with respect to the reference current value at the timeof sixty-three gradation display is one. In the case five distributingmirror transistor groups 470 are arranged on both the sides,respectively, that is, ten distributing mirror transistor groups 470 arearranged in total, the ratio is 1/5. Note that, since it is necessary tomake the left and right output current values the same, it is necessaryto make the number of distributing mirror transistor groups 470constituting the rows 481 a of the transistors for mirror and the numberof the distributing mirror transistor groups 470 constituting rows 481 bof transistors for mirror identical of FIG. 48.

In addition, a method of controlling a value of (a channel total area ofthe distributing mirror transistor 112)/(a channel total area of thecurrent source for gradation display 113) to be within the range of FIG.45 can be realized by adjusting the number of the distributing mirrortransistor group 470 constituting the rows 481 of the transistors formirror in the same manner.

In FIG. 48, the arrangement is shown in the case of monochrome. However,in a color panel, an arrangement as shown in FIG. 49 is adopted. In thisexample, red, green, and blue were used as three primary colors, and acommon gate line and a distributing mirror transistor were preparedindependently for each color such that a current per one gradation couldbe set independently for each color. R, G and B are affixed to the endsof reference characters for circuits for red display, circuits for greendisplay, and circuits for blue display, respectively. As the common gatesignal lines, 491 a, 491 b, and 491 c were prepared for red display,green display, and blue display, respectively.

Consequently, since agate potential of the current source for gradationdisplay 113 can be set to a different value for each color, it becomespossible to adjust white balance and a maximum luminance according to acurrent-luminance characteristic and a chromaticity coordinates value ofa display element to be used. A reference current is inputted from twopositions on the left and right for each color, that is, six positionsin total. Three times as many reference current generation units areprepared.

In the rows 481 of the transistors for mirror consisting of pluraldistributing mirror transistor groups 470 for an identical color, thetransistors are arranged with three primary colors of red, green, andblue as one set, and the number of sets are increased rather thanarranging the transistors as a set for each color as shown in FIG. 49.Consequently, since the transistors arranged over a wide range, itbecomes possible to reduce influence of a local change of a thresholdvoltage. In addition, deviation of a mirror ratio for each color is alsoeliminated. In FIG. 49, the transistors indicated by CS(R) belong to thedistributing mirror transistor group 490 for red display, thetransistors indicated by CS(G) belong to the distributing mirrortransistor group 490 for green display, and the transistors indicated byCS(B) belong to the distributing mirror transistor group 490 for bluedisplay.

Incidentally, in order to prevent left and right output current valuesfrom deviating from each other, the current Ig flowing to the commongate line 117 shown in FIG. 56 is reduced. If a deviation of draincurrents of the distributing mirror transistor 112 on the left and rightis within 1%, deviation of an output is also within 1%. Thus, boundariesof the driver ICs 17 are not recognized. That is, a value of(Is+Ig)−(Is−Ig)=2×Ig only has to be 1% or less with respect to Is.

From the Ohm's law, Ig takes a value found by dividing a potentialdifference between both the ends of the common gate line 117 by aresistance value. Since it is better that Ig is smaller, it is necessaryto regulate a maximum value. Ig is maximized when the potentialdifference between both the ends of the common gate line 117 ismaximized and in the case in which one of the left and rightdistributing mirror transistors 112 has a low threshold value and highmobility, and the other has a high threshold value and low mobility. Inthis case, since one of the left and right distributing mirrortransistors 112 has a minimum gate voltage and the other has a maximumgate voltage, the difference increases. A gate voltage-drain currentcharacteristic of the distributing mirror transistor 112 is shown inFIG. 60. Here, 601 indicates a characteristic of a low threshold valueand high mobility, and 602 indicates a characteristic of a highthreshold value and low mobility. As shown in FIG. 56, when a referencecurrent Is is flown to a transistor having the characteristics of 601and 602, a gate voltage of 601 is Vgb, and a gate voltage of 602 is Vgw.Then, a voltage applied to the common gate line 117 is ΔVg=(Vgb−Vgw).Therefore, Ig=(Vgb−Vgw)/Rg. Here, Rg is a total resistance value of thecommon gate line 117.

Since a condition for preventing the boundaries of the driver ICs 17from being visible is (2×Ig)≦(Is×0.01), after all, the total resistancevalue Rg of the common gate line 117 and the reference current Is arerequired to have a relation as described below. (Vgb−Vgw)/Rg≦(Is×0.005).

Here, Vgb and Vgw are known in advance because these are determinedaccording to a use process. Thus, if a reference current is determined,a necessary gate resistance value is determined. A range of a totalresistance value of the gate signal line 117, which could be taken withrespect to the reference current 19, is shown in FIG. 59. In order toeliminate the boundaries of the driver ICs 17, the total resistancevalue is required to be within a range 592.

A minimum value of the total resistance value is a larger one of a valuesatisfying (Vgb−Vgw)/Rg≦(Is×0.005) and 1 KΩ. This is because it isdifficult to reduce the total resistance value to 1 kΩ or less due to aresistance of a contact of a common gate line, a wiring resistance, andthe like. (Even if this could be realized, cost increases because acircuit size becomes larger.)

In addition, since Ig decreases as a resistance value is larger, adifference between the left and the right is eliminated, but 5 MΩ is themaximum. In relation to a realizable maximum sheet resistance value, ifit is attempted to increase a resistance value of the gate signal line117 to 5 MΩ or more, as shown in FIG. 61, the gate signal line 117 isrequired to be made long by providing bent portions 611 formed bybending parts of wiring of the common gate line 117. In addition, if theresistance value of the gate line increases, the gate line issusceptible to noises. In addition to susceptibility to noises, since awiring length is secured, if the gate line is wired as shown in FIG. 61,the gate line becomes like an antenna and easily picks up noises. If apotential of the gate signal line 117 fluctuates due to noises, anoutput current is affected. Therefore, 5 MΩ, which is a maximumresistance value to be obtained even if the wiring is not bent as shownin FIG. 61, is a maximum value.

From the above, it is possible to prevent unevenness of boundaries amongchips due to a difference of currents at both ends of a chip by settingthe resistance value of the gate line 117 in a region of 592 withrespect to the reference current 19. Note that the above-described eachnumerical value is a practical value and may include a predeterminederror such of, for example, a few %.

With the structure of the output stage as described above, fluctuationof currents at the left and right ends of the driver IC 17 decreases,and display without block unevenness, which occurs in boundaries ofchips, is possible.

In the above-described method, the resistance element 301 in thereference current generation unit for generating a reference current isformed of a component externally attached to the driver IC 17. In orderto reduce the number of packaged components and simplify wiring of anarray, incorporation of a resistance element is necessary. In thisembodiment, next, a structure has been devised in which fluctuation ofthe reference current 19 is also reduced in the case in which thisresistance element 301 is incorporated.

In order to reduce the fluctuation of the reference current 19,structures of FIGS. 1 and 62 have been devised.

FIG. 1 showing a first method will be explained.

In the method of FIG. 1, in order to form two reference current sourcesin a chip, components shown in FIG. 30 are incorporated in the chip bythe number of two, respectively. In addition, the resistance element 301is divided into two parts, and there are four parts in total (11 a to 11d). Although a resistor is often externally attached due to a problem ofaccuracy of a resistance value, a structure of incorporating a resistoris adopted in this embodiment. It is possible to reduce the number ofexternally attached components and reduce cost and a packaging area.

In the case in which one driver IC 17 is used, or in the case in whichplural chips are used and a driver IC is not adjacent to the otherdriver ICs, it is assumed that a current source adopts a structureindicated by 10 a of FIG. 1.

A structure of a current source in the case in which two driver ICs 17are in contact with each other is like a structure of two currentsources shown in the center of FIG. 1. One of the two necessaryresistance elements 11 is taken in from different ICs 17 by the externalwiring 16. A constant current source circuit at a right end of a driver17 a is shown in FIG. 66( a), and a constant current source circuit at aleft end of a driver 17 b is shown in FIG. 66( b). Reference numeralsaffixed to components of FIG. 66 correspond to those in FIG. 1.

One resistance element 11 is brought from both the ICs 17 adjacent toeach other, respectively. In FIG. 66( a), a resistance element lid isfrom the IC 17 a, and a resistance element 11 e is from the IC 17 b. Inaddition, in FIG. 66( b), a resistance element 11 c is from the IC 17 a,and a resistance element 11 f is from the IC 17 b. When a resistancevalue of the resistance element 11 is defined as shown in FIG. 66, acurrent (I19 b) flowing to 19 b is Vstd1/(R1+R2), and a current (I19 c)flowing to 19 c is Vstd2/(R3+R4). Since reference current signal linesof 15 a and 15 b are connected outside the IC 17, Vstd1=Vstd2.Therefore, I19 b and I19 c are different due to fluctuation in fourresistance elements 11. In order to form a resistor inside the IC 17, adiffused resistor and a polysilicon resistor can be used. In order tocreate a resistor with less fluctuation, it is preferable to use thepolysilicon resistor. Fluctuation is about 5% including fluctuationamong chips and among lots. However, in the case in which two resistanceelements 11 are created close to each other in an identical chip,fluctuation of a resistance value is about 0.1%. Thus, fluctuationbetween the resistance elements 11 c and 11 d (R3 and R2) and betweenthe resistance elements 11 e and 11 f (R1 and R4) shown in FIGS. 1 and66 is controlled to 0.1% respectively. Therefore, fluctuation between(R1+R2) and (R3+R4), which causes fluctuation between I19 b and I19 c,is 0.14% which is a root mean square of 0.1.

In this way, resistors determining a current value are taken from twochips adjacent to each other, whereby a current becomes independent fromfluctuation among chips and among lots, and the polysilicon resistorhaving fluctuation of about 5% is also available for practical use.Thus, an incorporated resistor and the driver IC 17 without blockunevenness can be realized.

Note that, in the above explanation, the explanation is made assumingthat a driver is a driver of a monochrome output. However, the presentinvention is also applicable to a drive of a multicolor output.Identical circuits only have to be prepared by the number multiplied bythe number of display colors. For example, in the case of three coloroutputs of red, green, and blue, it is sufficient to incorporate threeidentical circuits in an identical IC as shown in FIG. 65 and use thecircuits as circuits for red, green, and blue, respectively.

In addition, in FIG. 1, the description is made with the two driver ICs17. In general, the present invention can be implemented in the samemanner in the case in which M (M is an arbitrary natural number) driverICs are arranged. An example thereof is shown in FIG. 64.

FIG. 62 shows a second embodiment.

FIG. 62 is different from FIG. 1 in a connection method for theresistance elements 11. In all the four resistance elements, a terminalopposite to an external connection end is connected to a power supply.

A circuit diagram of a reference current generation unit is shown inFIG. 67. Note that, here, the reference voltage signal line 15 isconnected outside an IC chip.

Fluctuation of the reference current 19 depends upon fluctuation of aresistance value as in the first embodiment. Since resistors R21 and R22and resistors R31 and R32 are in an identical chip, fluctuation amongthe resistors is about 0.1%. Therefore, fluctuation between a combinedresistance Rb of R22 and R31 and a combined resistance Rc of R21 and R32is 0.14%.

In this case, since influence of fluctuation among chips is eliminatedoutwardly, even if the resistors are formed of the polysilicon resistor,display without block unevenness is also possible.

In the above explanation, the reference voltage signal line 15 isexplained with the example in which an analog voltage is inputtedthereto from the outside. However, as shown in FIG. 70, an analogvoltage may be changed in a programmable manner. In FIG. 70, an ON/OFFstate of a switch 312 changes and a value of a reference voltage 15changes according to control data 313. It is possible to change not onlya value of the reference current 19 but also luminance of a displaypanel according to the control data 313. A structure shown in FIG. 70 isadopted in the first embodiment, and a structure shown in FIG. 73 isadopted in the second embodiment.

Note that, in the case in which the plural driver ICs 17 are used as inFIG. 1, the circuit of FIG. 70 may be operated individually for each IC17. Alternatively, as shown in FIG. 72, the reference voltage signalline 15 supplied to plural reference current generation circuits may becontrolled by one voltage adjustment unit 315. In this way, thereference current 19 can be adjusted inside the IC 17, whereby, forexample, in the personal digital assistant shown in FIG. 14, in order tolengthen a life of a battery, it is possible to perform display at anormal luminance when the button 142 is operated, and the luminance isreduced after a fixed period has elapsed.

More specifically, when an input is made in the button 142 as shown inFIGS. 14 and 68, information is transferred to a CPU 682. The CPU sendsa signal to a controller 683, causes the controller 683 to rewritecontrol data inside the driver IC 17, and sets the reference voltage 15to a default value decided in advance. On the other hand, the CPU 682counts a certain fixed time and sends a signal to the controller 683again after the fixed time, and the controller 683 rewrites the controldata of the driver IC 17 to reduce a voltage of the reference voltagesignal line 15 to thereby decrease luminance. To put it in an extremeway, setting of the reference voltage 15, with which a reference currentrarely flows, may be performed by the voltage adjustment unit 315.

Consequently, it is possible to reduce a current value flowing to theinside of the driver IC 17. Moreover, a current flowing to a displayelement is also reduced, whereby it also becomes possible to reducepower consumption.

Besides, if an optical sensor is used instead of 142 such as the buttonof FIG. 14, there is also an advantage that luminance can be adjustedaccording to an environment around a display panel (brightness around adisplay panel). In an organic luminance element in which this driver IC17 is mainly used, visibility is high in the dark and is low underbright extraneous light (e.g., under the sunlight).

Thus, with the optical sensor, it is possible to flow a large amount ofa reference current of the driver IC 17 according to control of a CPU ora controller when ambient illumination is high and reduce an amount ofthe reference current of the driver IC 17 when the ambient illuminationis low. There is an advantage that control for performing display atluminance allowing most comfortable viewing according to the surroundingenvironment becomes possible.

In the case in which the plural driver ICs 17 are used to implement thefirst embodiment shown in FIG. 1, a structure as shown in FIG. 70 isadopted. Here, only one constant current source circuit is shown, pluralconstant current source circuits may be controlled by one voltageadjustment unit 315. For example, a structure as shown in FIG. 72 ispossible.

As a method for reduction of power, it is also possible to adopt astructure as shown in FIG. 69. A switch 691 is provided in the referencecurrent line 19 with respect to the structure of FIG. 1. By bringing theswitch 691 into a non-conduction state, a reference current can bereduced to 0, and it is possible to reduce power to be consumed insidethe IC 17.

In a display device using a display element, which has a temperaturecharacteristic, in a display unit, a function of compensating for thetemperature characteristic is required. For example, in some elements, acurrent-luminance characteristic changes according to temperature, andluminance changes with respect to an identical current input.

In order to keep luminance constant, a reference current only has to bechanged according to temperature. For example, there is a method ofconnecting a temperature compensation element 631 to the resistor 11 inparallel. Consequently, a combined resistance value changes according totemperature, and the reference current 19 also changes. By changing thereference current in a direction of compensating for the temperaturecharacteristic, it becomes possible to realize a display device which isresistant to temperature change.

In the case in which temperature characteristic compensation isperformed in the structure of FIG. 1, a temperature compensation element631 only has to be attached as shown in FIG. 63. Since a resistancevalue determining a reference current changes according temperature, thetemperature characteristic compensation becomes possible.

Fluctuation in the polysilicon resistors is about 0.1% when theresistors are close to each other inside a chip and about 5% among chipsand among lots. In this range, block unevenness can be eliminated byusing the present invention. However, fluctuation may increase due to aproblem in processes. When fluctuation increases, the resistor becomesdefective, and yield of the driver IC 17 falls. Thus, as shown in FIG.71, a function which can adjust resistance values of the resistanceelements 11 is provided to reduce a value of a driver IC deviating fromthe fluctuation range to a value within the fluctuation range, wherebyit is possible to obtain a conforming item.

More specifically, the resistance elements 11 are divided into pluralparts. Wirings of Some of the plural parts are short-circuited (711). Inorder to increase a resistance value of the resistance element 11 a, theshort-circuited wirings 711 only have to be pattern-cut by an FIB or thelike. A magnitude of the increase of the resistance value is adjustableaccording to the number of wirings 711 to be pattern-cut. The same istrue for the resistance element 11 b, and this method is applicable toall the resistance elements 11 used in the present invention.Consequently, the resistance values of the resistance elements 11 areadjusted such that fluctuation is reduced to obtain a confirming itemjudgment.

In this way, the structure which can make many driver ICs conforming isadopted, whereby yield increases, and a display device, which is low incost and has less unevenness, can be realized.

The example in the case in which a transistor used in the pixel 74 isthe p type transistor has been described. The circuit can be realized inthe same manner if an n type transistor is used.

FIG. 74 shows a circuit for one pixel at the time when a pixel structureof a current mirror type is formed of the n type transistor. A directionin which a current flows is reversed, and a power supply voltage changesaccordingly. Therefore, a current flowing through a source signal line745 needs to flow from the source driver IC 17 toward the pixel 74. Asshown in FIG. 75, the structure of the output stage 14 is a currentmirror structure of the p type transistor so as to discharge a currentto the outside of the driver IC. A direction of a reference current isalso reversed to change the structure to the structure of FIG. 76 asopposed to the structure of FIG. 1.

A method of simultaneously controlling the reference voltage controlunits of the plural driver ICs 17 is also changed as shown in FIG. 77.

In this way, it is possible to apply a transistor used in a pixel inboth the p and n types.

In the case in which the current output stage 14 has the structure shownin FIG. 34, as described above, when a wafer having a threshold valuecharacteristic as shown in FIG. 21( a) is used, an output current isoutputted with an inclination for each terminal. Although it is possibleto make current values at the left and right ends substantiallyidentical according to the structure of FIG. 34, it is difficult to makea current value the same for all output terminals. In general, if outputfluctuation between adjacent output terminals is 1% or less, there is noproblem in display, and an inclination of a threshold valuecharacteristic only has to be in that range. However, an inclination maybe steep depending upon process fluctuation at the time when an IC isproduced, a state of a film formation device, or the like. In that case,it is likely that the pertinent IC becomes defective, and yield isdeteriorated.

Thus, in this embodiment, a method has been further devised whichrealizes a structure, with which uniform display can be realized withoutdepending upon an inclination as in FIG. 21( a), and block unevenness atthe time when plural ICs are used is prevented.

In order to realize uniform display, a reference current is distributedto each output to perform gradation display on the basis of thereference current provided for each output. A method of performingcurrent distribution is shown in FIGS. 78 and 79, and a structure of anoutput stage is shown in FIG. 35.

The distribution of the reference current to each output is performed inthree stages. First, a current is distributed from one reference currentsource 781 (parent current source) to N current sources 782 (childcurrent sources). Further, currents of the child current sources 782 aredistributed to M current sources 112 (grandchild current sources).Consequently, it has become possible to distribute M×N currents from onereference current.

In this figure, in distributing one current source into M×N pieces,current distribution is performed twice. The distribution can berealized whether the number of times of distribution is once or threetimes or more. However, it is most preferable to perform division twiceor three times.

Current fluctuation in each distributing means affects as fluctuation ofan output current in accordance with an increase of the number of timesof distribution. Since the current fluctuation affects an output as aroot mean squares of fluctuation in each distribution stage, in order tocontrol fluctuation of an adjacent output to 1% or less, it is necessaryto reduce the number of times of distribution or reduce fluctuation indistribution performed once. In order to reduce fluctuation in thedistribution performed once, in general, there is no way but to increasea transistor size, which leads to an increase of a chip area, and thereis a disadvantage that a size of the chips of the IC 17 increases. Inaddition, if the number of times of distribution increases, the numberof transistors also increases so much more for that, which alsoincreases the chip area. Therefore, the number of times of distributionis three times at the most.

On the other hand, in the case in which a current is distributed to alloutputs at a time, this is effective for a driver IC having 30 or lessoutputs, but it is difficult to apply it to an driver IC having morethan 100 outputs. In order to distribute a current by the number ofoutputs in distribution performed once, it is necessary to form acurrent mirror consisting of at least the number of outputs+1transistors. In general, in the current mirror, transistors forming themirror are arranged close to each other, whereby mirroring is performedutilizing the fact that transistor characteristics are substantiallyequal when the transistors are close to each other. When the number ofoutputs+1 current mirrors are formed, since a transistor of a mirrorsource and a transistor of a mirror destination may be arranged apartfrom each other, it becomes difficult to perform mirroring accurately.It is desirable to set the number of outputs, to which a current isdistributed at a time, to about thirty at the most.

A method of current distribution is shown in FIG. 79. The referencecurrent 19 is divided into N currents by the parent current source 781and a transistor 791. In this case, a set of transistors 794 and 781 arearranged close to each other such that there is no fluctuation in Ncurrents. Next, the distributed each current is further divided into Mcurrents In this case, the transistors 782 and 795 are arranged close toeach other to control current fluctuation due to characteristicfluctuation. A reference current could be distributed for each output. Acurrent corresponding to input gradation data is outputted from theoutput line 114 with the structure shown in FIG. 35 on the basis of thisdistributed current 796 (grandchild reference current). (In thisexample, an appropriate amount of current is outputted according to dataof six bits.) Note that M and N may be arbitrary natural number, but inparticular, 2 or more and 30 or less is preferable.

The driver IC 17 often created in a rectangular shape, and output padsare often arranged on a long side thereof. Each output of the currentoutput stage 14 is often placed near the output pads for effectiveutilization of a chip area. Therefore, in a driver IC of M×N outputs, afirst output stage and an M×Nth output stage are often about 10 to 25 mmapart from each other. When one reference current is divided into M×N,wiring to each output is also important. In the structure of FIG. 79, acurrent mirror is formed, and is arranged close to a part whereinformation is delivered in a form of a voltage is arranged close andwound around to the vicinity of an output stage in a place whereinformation is delivered in a form of a current. Consequently, itbecomes possible to distribute a current to an output 10 to 25 mm apartwith less fluctuation.

Incidentally, in the case in which display is performed using the pluraldriver ICs 17 having the output current stages as described above, inorder to prevent block unevenness, it is necessary to supply a referencecurrent of an identical amount to each IC.

A structure, in which fluctuation of the reference current 19 decreasesbetween the two driver ICs 17, is shown in FIG. 80.

The reference voltage 15 determining a reference current value isconnected in the outside, whereby an identical voltage is supplied.Next, the resistance element 11 is divided into two in the same manneras the first and the second embodiments, one of two is incorporated inan adjacent IC and another is incorporated in the IC are respectivelyused, whereby fluctuation between a combined resistance value of 11 band 11 c and a combined resistance value of 11 a and 11 d is about 0.14%which is a root mean square of 0.1% which is fluctuation in a chip of anincorporated polysilicon resistor. A reference current only hasfluctuation of 0.14%. This is equivalent to the first and the secondembodiments. Consequently, display without block unevenness, whichoccurs in boundaries of chips, has become possible in the driver IC 19using the structures of FIGS. 78 and 79 as well.

In the above explanation, the explanation is made assuming that a driveris a driver of a monochrome output. However, the present invention isalso applicable to a drive of a multicolor output. Identical circuitsonly have to be prepared by the number multiplied by the number ofdisplay colors. For example, in the case of three color outputs of red,green, and blue, it is sufficient to incorporate three identicalcircuits in an identical IC as shown in FIG. 65 and use the circuits ascircuits for red, green, and blue, respectively.

In the above explanation, the transistor is assumed to be a MOStransistor. However, the present invention is also applicable to a MIStransistor and a bipolar transistor in the same manner.

In addition, the present invention is applicable to a transistor of anymaterial such as crystal silicon, low-temperature polysilicon,high-temperature polysilicon, amorphous silicon, and a gallium arsenidecompound.

The explanation is made using an organic luminance element as a displayelement. However, the present invention can be implemented using anyelement as long as the element is a display element, in which a currentand luminance are in a proportional relation, such as an inorganicelectroluminescent element and a light-emitting diode.

Note that, in the above-described embodiments, the ICs 17 a and 17 bserving as driver ICs are equivalent to the driving semiconductorcircuit of the present invention. In addition, the reference currentgeneration units 10 a and 10 b and the parts equivalent thereto areequivalent to the reference current generating means of the presentinvention. Further, the current output stages 14 a and 14 b areequivalent to the drive current output mechanism of the presentinvention.

In addition, the common gate line 17 is equivalent to the common gateline of the present invention, and the distributing mirror transistors112 a and 112 b are equivalent to the current distributing means of thepresent invention. Further, the digital/analog conversion units 116 a to116 c are equivalent to the drive current generating means of thepresent invention. Moreover, the power supply 51 and the partsequivalent thereto are equivalent to the predetermined power supply ofthe present invention, and the reference voltage signal inputted fromthe reference voltage signal line 15 is equivalent to the referencevoltage signal of the present invention.

Further, the resistance elements 11 c to 11 f are equivalent to theplural resistance elements connected in series of the first presentinvention. In particular, in the case in which the resistance elements11 c and lid shown in FIG. 1 are the resistance elements formed on thechip of one of the pair of driving semiconductor circuits adjacent toeach other of the first present invention, the resistance elements 11 eand 11 f shown in the figure corresponds to the resistance elementsformed on the chip of the other of the pair of driving semiconductorcircuits adjacent to each other.

Moreover, the structure for distribution of a reference current shown inFIG. 78 is equivalent to the multistage structure of the drive currentoutput mechanism of the present invention.

INDUSTRIAL APPLICABILITY

As described above, according to the present invention, since outputcurrent values at left and right ends in an identical driver IC can bemade the same, and a reference current determining an output currentvalue can be made identical both in a chip and among chips, it hasbecome possible to, in a display device of performing display usingplural driver ICs, eliminate luminance unevenness which occurs inboundaries of driver ICs due to fluctuation in the driver ICs.Consequently, cascade connection of a current output type driver IC canbe realized. In addition, it has become possible to incorporateresistors, for which externally attached parts have been usedconventionally, by using the reference current generation unit of thepresent invention, and reduction of the number of packaged parts andsimplification of array wiring have become possible.

1. A driving semiconductor circuit group for a current drive typedisplay device constituted by arranging plural driving semiconductorcircuits wherein, at least one of said driving semiconductor circuitscomprises: a drive current output mechanism having a common gate line,first and second current distributing means which are provided at bothends of said common gate line and receive input of a reference current,plural drive current generating means which are provided along saidcommon gate line and generate drive currents on the basis of thereference current to be distributed from said current distributing meansin a current mirror system, and reference current generating means whichare provided in the vicinity of said current distributing means andgenerate the reference current from a reference voltage signal having areference voltage and predetermined power supplies having a voltagehigher than the reference voltage, wherein said plural drivingsemiconductor circuits are arranged, such that the ends of said commongate line of the respective driving semiconductor circuits are adjacentto each other, and wherein a pair of the reference current generatingmeans adjacent to each other in a pair of said driving semiconductorcircuits adjacent to each other acquire the predetermined power suppliesfrom the adjacent driving semiconductor circuits to each other andgenerate the reference current from the predetermined power supplies andthe reference voltage signal to be supplied to said drivingsemiconductor circuits, at least one of said driving semiconductorcircuits at least includes plural resistance elements connected inseries which are provided between said predetermined power supplies ofeach of said pair of reference current generating means adjacent to eachother and corresponding ones of said pair of reference currentgenerating means corresponding to the power supplies, respectively, anda part of said plural resistance elements connected in series are formedon a chip of one of said pair of driving semiconductor circuit adjacentto each other, and the remainder of said plural resistance elements areformed on a chip of the other of said pair of driving semiconductorcircuits adjacent to each other.
 2. The driving semiconductor circuitgroup for a current drive type display device according to claim 1,wherein a ratio of a sum of channel areas of a semiconductor elementgroup used for said first and second current distributing means withrespect to a sum of channel areas of a semiconductor element group usedfor said drive current generating means is substantially 0.01 or moreand 0.5 or less.
 3. A display device comprising the drivingsemiconductor circuit group according to claim
 2. 4. The drivingsemiconductor circuit group for a current drive type display deviceaccording to claim 1, wherein a value of (channel width)/(channellength) of a semiconductor element of a semiconductor element group usedfor said drive current generating means is substantially 0.01 or moreand 0.6 or less.
 5. A display device comprising the drivingsemiconductor circuit group according to claim
 4. 6. The drivingsemiconductor circuit group for a current drive type display deviceaccording to claim 1, wherein a total resistance value of said commongate line is substantially set to a value equal to or larger than alarger one of a value, which is found by dividing a voltage of adifference between a maximum value and a minimum value of a gate voltagewith respect to a reference current value in a use process by a value ofsubstantially 0.5% of the reference current (Is×0.005)(Vgb−Vgw)/(Is×0.005), and 1 KΩ, and equal to or smaller than 5 MΩ.
 7. Adisplay device comprising the driving semiconductor circuit groupaccording to claim
 6. 8. The driving semiconductor circuit group for acurrent drive type display device according to claim 1, the drivingsemiconductor circuit group determining, with a first switching meansgroup, whether or not said drive current generating means is connectedto an output stage according to the input signal, comprising a currentpath forming unit which allows a predetermined current value to flow tosaid drive current generating means via a second switching means groupfor determining a state opposite to a state determined by said firstswitching means group.
 9. A display device comprising the drivingsemiconductor circuit group according to claim
 8. 10. A display devicecomprising the driving semiconductor circuit group according to claim 1.11. A driving semiconductor circuit group for a current drive typedisplay device constituted by arranging plural driving semiconductorcircuits, at least one of the plural driving semiconductor circuitsincludes: a drive current output mechanism having a common gate line,first and second current distributing means which are provided at bothends of the common gate line and receive input of a reference current,plural drive current generating means which are provided along thecommon gate line and generate drive currents on the basis of thereference current to be distributed from the current distributing meansin a current mirror system, and reference current generating means whichare provided in the vicinity of the current distributing means andgenerate the reference current from a reference voltage signal having areference voltage and predetermined power supplies having a voltagehigher than the reference voltage, wherein the ends of the common gateline of the respective driving semiconductor circuits are adjacent toeach other, in which a pair of the reference current generating meansadjacent to each other in a pair of the driving semiconductor circuitsadjacent to each other acquire the predetermined power supplies from theadjacent driving semiconductor circuits to each other and generate thereference current from the predetermined power supplies and thereference voltage signal to be supplied to the driving semiconductorcircuits, and resistance elements are provided between the predeterminedpower supplies of the respective pair of reference current generatingmeans adjacent to each other and the pair of reference currentgenerating means corresponding to the power supplies, respectively. 12.The driving semiconductor circuit group for a current drive type displaydevice according to claim 11, wherein a ratio of a sum of channel areasof a semiconductor element group used for said first and second currentdistributing means with respect to a sum of channel areas of asemiconductor element group used for said drive current generating meansis substantially 0.01 or more and 0.5 or less.
 13. A display devicecomprising the driving semiconductor circuit group according to claim12.
 14. The driving semiconductor circuit group for a current drive typedisplay device according to claim 11, wherein a value of (channelwidth)/(channel length) of a semiconductor element of a semiconductorelement group used for said drive current generating means issubstantially 0.01 or more and 0.6 or less.
 15. A display devicecomprising the driving semiconductor circuit group according to claim14.
 16. The driving semiconductor circuit group for a current drive typedisplay device according to claim 11, wherein a total resistance valueof said common gate line is substantially set to a value equal to orlarger than a larger one of a value, which is found by dividing avoltage of a difference between a maximum value and a minimum value of agate voltage with respect to a reference current value in a use processby a value of substantially 0.5% of the reference current (Is×0.005)(Vgb−Vgw)/(Is×0.005), and 1 KΩ, and equal to or smaller than 5 MΩ.
 17. Adisplay device comprising the driving semiconductor circuit groupaccording to claim
 16. 18. The driving semiconductor circuit group for acurrent drive type display device according to claim 11, the drivingsemiconductor circuit group determining, with a first switching meansgroup, whether or not said drive current generating means is connectedto an output stage according to the input signal, comprising a currentpath forming unit which allows a predetermined current value to flow tosaid drive current generating means via a second switching means groupfor determining a state opposite to a state determined by said firstswitching means group.
 19. A display device comprising the drivingsemiconductor circuit group according to claim
 18. 20. A display devicecomprising the driving semiconductor circuit group according to claim11.
 21. A driving semiconductor circuit group constituted by arrangingplural driving semiconductor circuits for a current drive type displaydevice, at least one of the plural driving semiconductor circuitsincludes: a drive current output mechanism having first and secondcurrent distributing means which receive input of a reference current,and plural drive current generating means which generate drive currentson the basis of the reference current to be distributed from the currentdistributing means; and reference current generating means whichgenerate the reference current from a reference voltage signal having areference voltage and predetermined power supplies having a voltagehigher than the reference voltage, wherein respective outputs of thereference current of the respective driving semiconductor circuits areadjacent to each other, in which in a pair of the driving semiconductorcircuits adjacent to each other, the respective reference currentgenerating means acquire the predetermined power supplies from theadjacent driving semiconductor circuits to each other and generate thereference current from the predetermined power supplies and thereference voltage signal to be supplied to the driving semiconductorcircuits, the drive current output mechanism has a multi-stagestructure, each stage of the multi-stage structure has at least one sethaving a current source and a delivery unit which takes out pluraloutputs from the current source, a current source of a first stage ofthe multi-stage structure is the reference current to be distributedfrom the current distributing means, the plural outputs of the deliveryunit of a last stage of the multi-stage structure are the drivecurrents, the plural outputs of the delivery units of the respectivestages excluding the last stage are given to the current source of theset of a stage below the stages, respectively.
 22. The drivingsemiconductor circuit group for a current drive type display deviceaccording to claim 21, in which the driving semiconductor circuits haveat least plural resistance elements connected in series which areprovided between the predetermined power supplies of the referencecurrent generating means for the respective pair of drivingsemiconductor circuits adjacent to each other and the pair of referencecurrent generating means corresponding to the power supplies,respectively, and a part of the plural resistance elements connected inseries are formed on a chip of one of the pair of driving semiconductorcircuits adjacent to each other, and the remainder of the resistanceelements are formed on a chip of the other of the pair of drivingsemiconductor circuits adjacent to each other.
 23. A display devicecomprising the driving semiconductor circuit group according to claim22.
 24. The driving semiconductor circuit group for a current drive typedisplay device according to claim 21, in which the driving semiconductorcircuits have at least plural resistance elements connected in parallelwhich are provided between the predetermined power supplies of thereference current generating means of the respective pair of drivingsemiconductor circuits adjacent to each other and the pair of referencecurrent generating means corresponding to the power supplies,respectively, and a part of the plural resistance elements connected inparallel are formed on a chip of one of the pair of drivingsemiconductor circuits adjacent to each other, and the remainder of theresistance elements are formed on a chip of the other of the pair ofdriving semiconductor circuits adjacent to each other.
 25. A displaydevice comprising the driving semiconductor circuit group according toclaim
 24. 26. The driving semiconductor circuit group for a currentdrive type display device according to claim 21, including resistanceelements which are provided between the predetermined power supplies ofthe respective reference current generating means and the pair ofreference current generating means corresponding to the power supplies,respectively.
 27. A display device comprising the driving semiconductorcircuit group according to claim
 26. 28. A display device comprising thedriving semiconductor circuit group according to claim 21.